Patchwork [2/8] target-sh4: MMU: fix mem_idx computation

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Submitter Aurelien Jarno
Date Feb. 6, 2010, 4:43 p.m.
Message ID <1265474623-23367-3-git-send-email-aurelien@aurel32.net>
Download mbox | patch
Permalink /patch/44706/
State New
Headers show

Comments

Aurelien Jarno - Feb. 6, 2010, 4:43 p.m.
The mem_idx is wrongly computed. As written in target-sh4/cpu.h, mode 0
corresponds to kernel mode (SR_MD = 1), while mode 1 corresponds to user
mode (SR_MD = 0).

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
 target-sh4/translate.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Patch

diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index 8f0a986..bff3188 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1905,7 +1905,7 @@  gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb,
     ctx.bstate = BS_NONE;
     ctx.sr = env->sr;
     ctx.fpscr = env->fpscr;
-    ctx.memidx = (env->sr & SR_MD) ? 1 : 0;
+    ctx.memidx = (env->sr & SR_MD) == 0 ? 1 : 0;
     /* We don't know if the delayed pc came from a dynamic or static branch,
        so assume it is a dynamic branch.  */
     ctx.delayed_pc = -1; /* use delayed pc from env pointer */