diff mbox

[3/4] pinctrl: tegra: support nvidia,io-hv DT property

Message ID 1424811651-18660-3-git-send-email-swarren@wwwdotorg.org
State New
Headers show

Commit Message

Stephen Warren Feb. 24, 2015, 9 p.m. UTC 
From: Stephen Warren <swarren@nvidia.com>

Both nvidia,io-hv and nvidia,rcv-sel represent the fact that a particular
pin's IO buffers are configured to accept "high voltage" input signals.
The TRM for different chips names the register field rcv-sel on older
SoCs and io_hv on newer SoCs. Add the new naming option into the pinctrl
driver so that DT files can use naming consistent with the TRM.

This new property name will be documented in the patch that adds support
for the new SoC.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 drivers/pinctrl/pinctrl-tegra.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Linus Walleij March 7, 2015, 8:10 p.m. UTC | #1 
On Tue, Feb 24, 2015 at 10:00 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:

> From: Stephen Warren <swarren@nvidia.com>
>
> Both nvidia,io-hv and nvidia,rcv-sel represent the fact that a particular
> pin's IO buffers are configured to accept "high voltage" input signals.
> The TRM for different chips names the register field rcv-sel on older
> SoCs and io_hv on newer SoCs. Add the new naming option into the pinctrl
> driver so that DT files can use naming consistent with the TRM.
>
> This new property name will be documented in the patch that adds support
> for the new SoC.
>
> Signed-off-by: Stephen Warren <swarren@nvidia.com>

Patch applied.

Yours,
Linus Walleij
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Stephen Warren March 9, 2015, 3:58 p.m. UTC | #2 
On 03/07/2015 01:10 PM, Linus Walleij wrote:
> On Tue, Feb 24, 2015 at 10:00 PM, Stephen Warren <swarren@wwwdotorg.org> wrote:
>
>> From: Stephen Warren <swarren@nvidia.com>
>>
>> Both nvidia,io-hv and nvidia,rcv-sel represent the fact that a particular
>> pin's IO buffers are configured to accept "high voltage" input signals.
>> The TRM for different chips names the register field rcv-sel on older
>> SoCs and io_hv on newer SoCs. Add the new naming option into the pinctrl
>> driver so that DT files can use naming consistent with the TRM.
>>
>> This new property name will be documented in the patch that adds support
>> for the new SoC.
>>
>> Signed-off-by: Stephen Warren <swarren@nvidia.com>
>
> Patch applied.

Thanks!

For the record in the list archives, I see patch 4 in your git repo too, 
although I didn't get a "patch applied" email for that one.
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diff mbox

Patch

diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c
index 6cd651a88398..4c95c2024a1c 100644
--- a/drivers/pinctrl/pinctrl-tegra.c
+++ b/drivers/pinctrl/pinctrl-tegra.c
@@ -103,6 +103,7 @@  static const struct cfg_param {
 	{"nvidia,lock",			TEGRA_PINCONF_PARAM_LOCK},
 	{"nvidia,io-reset",		TEGRA_PINCONF_PARAM_IORESET},
 	{"nvidia,rcv-sel",		TEGRA_PINCONF_PARAM_RCV_SEL},
+	{"nvidia,io-hv",		TEGRA_PINCONF_PARAM_RCV_SEL},
 	{"nvidia,high-speed-mode",	TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE},
 	{"nvidia,schmitt",		TEGRA_PINCONF_PARAM_SCHMITT},
 	{"nvidia,low-power-mode",	TEGRA_PINCONF_PARAM_LOW_POWER_MODE},