Message ID | 1424455040-3335-2-git-send-email-pbonzini@redhat.com |
---|---|
State | New |
Headers | show |
On 02/20/2015 09:57 AM, Paolo Bonzini wrote: > diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h > index 7a9980e..8ba977a 100644 > --- a/tcg/i386/tcg-target.h > +++ b/tcg/i386/tcg-target.h > @@ -25,6 +25,7 @@ > #define TCG_TARGET_I386 1 > > #define TCG_TARGET_INSN_UNIT_SIZE 1 > +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 31. Positive displacements only in 64-bit mode. I don't think it's worth conditionalizing this for 32-bit, since we can't actually allocate 2G of TLBs and then actually accomplish anything. ;-) > diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h > index c88a1c9..f5ba52c 100644 > --- a/tcg/mips/tcg-target.h > +++ b/tcg/mips/tcg-target.h > @@ -27,6 +27,7 @@ > #define TCG_TARGET_MIPS 1 > > #define TCG_TARGET_INSN_UNIT_SIZE 4 > +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 > #define TCG_TARGET_NB_REGS 32 > > typedef enum { > diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h > index 32ac442..7ce7048 100644 > --- a/tcg/ppc/tcg-target.h > +++ b/tcg/ppc/tcg-target.h > @@ -32,6 +32,7 @@ > > #define TCG_TARGET_NB_REGS 32 > #define TCG_TARGET_INSN_UNIT_SIZE 4 > +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 Close enough, since the BUILD_BUG_ON should still catch this out if somehow the size is within that last 16 bytes of 64k. r~
On 20.02.15 20:36, Richard Henderson wrote: > On 02/20/2015 09:57 AM, Paolo Bonzini wrote: >> diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h >> index 7a9980e..8ba977a 100644 >> --- a/tcg/i386/tcg-target.h >> +++ b/tcg/i386/tcg-target.h >> @@ -25,6 +25,7 @@ >> #define TCG_TARGET_I386 1 >> >> #define TCG_TARGET_INSN_UNIT_SIZE 1 >> +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 > > 31. > > Positive displacements only in 64-bit mode. I don't think it's worth > conditionalizing this for 32-bit, since we can't actually allocate 2G of TLBs > and then actually accomplish anything. ;-) I suppose Paolo is already off to the hospital ;). Richard, if I just s/32/31/ in the hunk above, does that mean you ack the patch? Alex > >> diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h >> index c88a1c9..f5ba52c 100644 >> --- a/tcg/mips/tcg-target.h >> +++ b/tcg/mips/tcg-target.h >> @@ -27,6 +27,7 @@ >> #define TCG_TARGET_MIPS 1 >> >> #define TCG_TARGET_INSN_UNIT_SIZE 4 >> +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 >> #define TCG_TARGET_NB_REGS 32 >> >> typedef enum { >> diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h >> index 32ac442..7ce7048 100644 >> --- a/tcg/ppc/tcg-target.h >> +++ b/tcg/ppc/tcg-target.h >> @@ -32,6 +32,7 @@ >> >> #define TCG_TARGET_NB_REGS 32 >> #define TCG_TARGET_INSN_UNIT_SIZE 4 >> +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 > > Close enough, since the BUILD_BUG_ON should still catch this out if somehow the > size is within that last 16 bytes of 64k. > > > r~ >
On 02/23/2015 05:21 AM, Alexander Graf wrote: > I suppose Paolo is already off to the hospital ;). Richard, if I just > s/32/31/ in the hunk above, does that mean you ack the patch? Yep. r~
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h index 60c7493..8aec04d 100644 --- a/tcg/aarch64/tcg-target.h +++ b/tcg/aarch64/tcg-target.h @@ -14,6 +14,7 @@ #define TCG_TARGET_AARCH64 1 #define TCG_TARGET_INSN_UNIT_SIZE 4 +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 24 #undef TCG_TARGET_STACK_GROWSUP typedef enum { diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h index 1c719e2..6559f80 100644 --- a/tcg/arm/tcg-target.h +++ b/tcg/arm/tcg-target.h @@ -27,6 +27,7 @@ #undef TCG_TARGET_STACK_GROWSUP #define TCG_TARGET_INSN_UNIT_SIZE 4 +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 typedef enum { TCG_REG_R0 = 0, diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h index 7a9980e..8ba977a 100644 --- a/tcg/i386/tcg-target.h +++ b/tcg/i386/tcg-target.h @@ -25,6 +25,7 @@ #define TCG_TARGET_I386 1 #define TCG_TARGET_INSN_UNIT_SIZE 1 +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 #ifdef __x86_64__ # define TCG_TARGET_REG_BITS 64 diff --git a/tcg/ia64/tcg-target.h b/tcg/ia64/tcg-target.h index d675589..a04ed81 100644 --- a/tcg/ia64/tcg-target.h +++ b/tcg/ia64/tcg-target.h @@ -26,6 +26,8 @@ #define TCG_TARGET_IA64 1 #define TCG_TARGET_INSN_UNIT_SIZE 16 +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 21 + typedef struct { uint64_t lo __attribute__((aligned(16))); uint64_t hi; diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h index c88a1c9..f5ba52c 100644 --- a/tcg/mips/tcg-target.h +++ b/tcg/mips/tcg-target.h @@ -27,6 +27,7 @@ #define TCG_TARGET_MIPS 1 #define TCG_TARGET_INSN_UNIT_SIZE 4 +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 #define TCG_TARGET_NB_REGS 32 typedef enum { diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index 32ac442..7ce7048 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -32,6 +32,7 @@ #define TCG_TARGET_NB_REGS 32 #define TCG_TARGET_INSN_UNIT_SIZE 4 +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16 typedef enum { TCG_REG_R0, TCG_REG_R1, TCG_REG_R2, TCG_REG_R3, diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h index 5acc28c..91576d5 100644 --- a/tcg/s390/tcg-target.h +++ b/tcg/s390/tcg-target.h @@ -25,6 +25,7 @@ #define TCG_TARGET_S390 1 #define TCG_TARGET_INSN_UNIT_SIZE 2 +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 19 typedef enum TCGReg { TCG_REG_R0 = 0, diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h index 0c4c8af..f584de4 100644 --- a/tcg/sparc/tcg-target.h +++ b/tcg/sparc/tcg-target.h @@ -27,6 +27,7 @@ #define TCG_TARGET_REG_BITS 64 #define TCG_TARGET_INSN_UNIT_SIZE 4 +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 #define TCG_TARGET_NB_REGS 32 typedef enum { diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index bd1e974..4c41305 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -44,6 +44,7 @@ #define TCG_TARGET_INTERPRETER 1 #define TCG_TARGET_INSN_UNIT_SIZE 1 +#define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 #if UINTPTR_MAX == UINT32_MAX # define TCG_TARGET_REG_BITS 32
This will be used to size the TLB when more than 8 MMU modes are used by the target. Limitations come from the limited size of the immediate fields (which sometimes, as in the case of Aarch64, extend to instructions that shift the immediate). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> --- tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 1 + tcg/ia64/tcg-target.h | 2 ++ tcg/mips/tcg-target.h | 1 + tcg/ppc/tcg-target.h | 1 + tcg/s390/tcg-target.h | 1 + tcg/sparc/tcg-target.h | 1 + tcg/tci/tcg-target.h | 1 + 9 files changed, 10 insertions(+)