diff mbox

[4.8] Backport "Fix debug-insn sensitivity in RA" patch to 4.8

Message ID CAFULd4YPtM8VWCgGh8vEo3oTqg3-9x6Ges78hbVopXpWJ+RPFQ@mail.gmail.com
State New
Headers show

Commit Message

Uros Bizjak Feb. 18, 2015, 5:25 p.m. UTC
Hello!

Richard's patch at [1] is needed to fix a bootstrap failure on
alpha-linux-gnu on 4.8 branch. Without the patch, IRA creates
different sequences, depending on the presence of -g option.

One of the many comparison failures is in expr.c, where
-fdebug-compare fails with:

../../gcc-svn/branches/gcc-4_8-branch/gcc/expr.c:6341#
{*extendsidi2_1}
-     (expr_list:REG_EQUIV (mem/c:SI (plus:DI (reg/f:DI 30 $30)
-                (const_int 144 [0x90])) [  S4 A64])
-        (nil)))
 (insn# 0 0 (const_int 0 [0])
../../gcc-svn/branches/gcc-4_8-branch/gcc/expr.c:6342# {nop}
      (nil))
 (insn:TI# 0 0 (set (reg:DI 1 $1 [orig:71 D.xxxx ] [71])
@@ -152270,10 +152268,10 @@
                     (const_int 136 [0x88])) [ alias_set+0 S4 A64])))
../../gcc-svn/branches/gcc-4_8-branch/gcc/expr.c:6341#
{*extendsidi2_1}
      (nil))
 (insn:TI# 0 0 (set (reg/v:DI 15 $15 [orig:263 nontemporal ] [263])
-        (zero_extend:DI (reg:QI 19 $19 [265])))
../../gcc-svn/branches/gcc-4_8-branch/gcc/expr.c:6341#
{zero_extendqidi2}
-     (expr_list:REG_DEAD (reg:QI 19 $19 [265])
+        (zero_extend:DI (reg:QI 4 $4 [265])))
../../gcc-svn/branches/gcc-4_8-branch/gcc/expr.c:6341#
{zero_extendqidi2}
+     (expr_list:REG_DEAD (reg:QI 4 $4 [265])
         (nil)))
-(jump_insn# 0 0 (set (pc)
+(jump_insn:TI# 0 0 (set (pc)
         (if_then_else (eq (reg:DI 1 $1 [orig:71 D.xxxx ] [71])
                 (const_int 0 [0]))
             (label_ref:DI #)

2015-02-18  Uros Bizjak  <ubizjak@gmail.com>

    Backport from mainline
    2013-09-08  Richard Sandiford  <rdsandiford@googlemail.com>

    * ira.c (update_equiv_regs): Only call set_paradoxical_subreg
    for non-debug insns.
    * lra.c (new_insn_reg): Take the containing insn as a parameter.
    Only modify lra_reg_info[].biggest_mode if it's non-debug insn.
    (collect_non_operand_hard_regs, add_regs_to_insn_regno_info): Update
    accordingly.

testsuite/ChangeLog:

2015-02-18  Uros Bizjak  <ubizjak@gmail.com>

    Backport from mainline
    2013-09-08  Richard Sandiford  <rdsandiford@googlemail.com>

    * g++.dg/debug/ra1.C: New test.

Patch was bootstrapped and regression tested on 86_64-linux-gnu
{,-m32} and alpha-linux-gnu, where it fixes all bootstrap comparison
failures.

The results are at [3], gfortran failures will be fixed by alias.c
backport, after the bootstrap problem is cured.

OK for branch?

[1] https://gcc.gnu.org/ml/gcc-patches/2013-09/msg00472.html
[2] https://gcc.gnu.org/viewcvs/gcc?view=revision&revision=202369
[3] https://gcc.gnu.org/ml/gcc-testresults/2015-02/msg02069.html

Uros.
Index: ira.c
===================================================================
--- ira.c	(revision 220763)
+++ ira.c	(working copy)
@@ -2944,11 +2944,8 @@ update_equiv_regs (void)
      prevent access beyond allocated memory for paradoxical memory subreg.  */
   FOR_EACH_BB (bb)
     FOR_BB_INSNS (bb, insn)
-      {
-	if (! INSN_P (insn))
-	  continue;
-	for_each_rtx (&insn, set_paradoxical_subreg, (void *)pdx_subregs);
-      }
+      if (NONDEBUG_INSN_P (insn))
+	for_each_rtx (&insn, set_paradoxical_subreg, (void *) pdx_subregs);
 
   /* Scan the insns and find which registers have equivalences.  Do this
      in a separate scan of the insns because (due to -fcse-follow-jumps)
Index: lra.c
===================================================================
--- lra.c	(revision 220763)
+++ lra.c	(working copy)
@@ -446,13 +446,13 @@ init_insn_regs (void)
     = create_alloc_pool ("insn regs", sizeof (struct lra_insn_reg), 100);
 }
 
-/* Create LRA insn related info about referenced REGNO with TYPE
-   (in/out/inout), biggest reference mode MODE, flag that it is
+/* Create LRA insn related info about a reference to REGNO in INSN with
+   TYPE (in/out/inout), biggest reference mode MODE, flag that it is
    reference through subreg (SUBREG_P), flag that is early clobbered
    in the insn (EARLY_CLOBBER), and reference to the next insn reg
    info (NEXT).	 */
 static struct lra_insn_reg *
-new_insn_reg (int regno, enum op_type type, enum machine_mode mode,
+new_insn_reg (rtx insn, int regno, enum op_type type, enum machine_mode mode,
 	      bool subreg_p, bool early_clobber, struct lra_insn_reg *next)
 {
   struct lra_insn_reg *ir;
@@ -460,7 +460,8 @@ static struct lra_insn_reg *
   ir = (struct lra_insn_reg *) pool_alloc (insn_reg_pool);
   ir->type = type;
   ir->biggest_mode = mode;
-  if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (lra_reg_info[regno].biggest_mode))
+  if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (lra_reg_info[regno].biggest_mode)
+      && NONDEBUG_INSN_P (insn))
     lra_reg_info[regno].biggest_mode = mode;
   ir->subreg_p = subreg_p;
   ir->early_clobber = early_clobber;
@@ -942,7 +943,7 @@ collect_non_operand_hard_regs (rtx *x, lra_insn_re
 		     && ! (FIRST_STACK_REG <= regno
 			   && regno <= LAST_STACK_REG));
 #endif
-		list = new_insn_reg (regno, type, mode, subreg_p,
+		list = new_insn_reg (data->insn, regno, type, mode, subreg_p,
 				     early_clobber, list);
 	      }
 	  }
@@ -1540,7 +1541,7 @@ add_regs_to_insn_regno_info (lra_insn_recog_data_t
       expand_reg_info ();
       if (bitmap_set_bit (&lra_reg_info[regno].insn_bitmap, uid))
 	{
-	  data->regs = new_insn_reg (regno, type, mode, subreg_p,
+	  data->regs = new_insn_reg (data->insn, regno, type, mode, subreg_p,
 				     early_clobber, data->regs);
 	  return;
 	}
@@ -1552,8 +1553,9 @@ add_regs_to_insn_regno_info (lra_insn_recog_data_t
 		if (curr->subreg_p != subreg_p || curr->biggest_mode != mode)
 		  /* The info can not be integrated into the found
 		     structure.  */
-		  data->regs = new_insn_reg (regno, type, mode, subreg_p,
-					     early_clobber, data->regs);
+		  data->regs = new_insn_reg (data->insn, regno, type, mode,
+					     subreg_p, early_clobber,
+					     data->regs);
 		else
 		  {
 		    if (curr->type != type)
Index: testsuite/g++.dg/debug/ra1.C
===================================================================
--- testsuite/g++.dg/debug/ra1.C	(revision 0)
+++ testsuite/g++.dg/debug/ra1.C	(working copy)
@@ -0,0 +1,77 @@
+/* { dg-options "-fcompare-debug" } */
+
+enum signop { SIGNED, UNSIGNED };
+enum tree_code { FOO, BAR };
+enum tree_code_class { tcc_type, tcc_other };
+extern enum tree_code_class tree_code_type[];
+
+struct tree_base {
+  enum tree_code code : 16;
+  unsigned unsigned_flag : 1;
+};
+
+struct tree_def {
+  tree_base base;
+  struct {
+    int precision;
+  } type_common;
+};
+
+typedef tree_def *tree;
+
+struct storage_ref
+{
+  storage_ref (const long *, unsigned int, unsigned int);
+
+  const long *val;
+  unsigned int len;
+  unsigned int precision;
+};
+
+inline storage_ref::storage_ref (const long *val_in,
+				 unsigned int len_in,
+				 unsigned int precision_in)
+  : val (val_in), len (len_in), precision (precision_in)
+{
+}
+
+struct hwi_with_prec
+{
+  long val;
+  unsigned int precision;
+  signop sgn;
+};
+
+inline storage_ref
+decompose (long *scratch, unsigned int precision,
+	   const hwi_with_prec &x)
+{
+  scratch[0] = x.val;
+  if (x.sgn == SIGNED || x.val >= 0 || precision <= sizeof (long) * 8)
+    return storage_ref (scratch, 1, precision);
+  scratch[1] = 0;
+  return storage_ref (scratch, 2, precision);
+}
+
+extern void tree_class_check_failed (int) __attribute__ ((__noreturn__));
+
+inline tree
+tree_class_check (tree t, const enum tree_code_class cls, int x)
+{
+  if (tree_code_type[t->base.code] != cls)
+    tree_class_check_failed (x);
+  return t;
+}
+
+tree wide_int_to_tree (tree, const storage_ref &);
+
+tree
+build_int_cstu (tree type, unsigned long val)
+{
+  hwi_with_prec x;
+  x.val = val;
+  x.precision = tree_class_check (type, tcc_type, 1)->type_common.precision;
+  x.sgn = (signop) tree_class_check (type, tcc_type, 2)->base.unsigned_flag;
+  long scratch[2];
+  return wide_int_to_tree (type, decompose (scratch, x.precision, x));
+}

Comments

Vladimir Makarov Feb. 20, 2015, 3:55 a.m. UTC | #1
On 2015-02-18 12:25 PM, Uros Bizjak wrote:
> Hello!
>
> Richard's patch at [1] is needed to fix a bootstrap failure on
> alpha-linux-gnu on 4.8 branch. Without the patch, IRA creates
> different sequences, depending on the presence of -g option.
>
> One of the many comparison failures is in expr.c, where
> -fdebug-compare fails with:
>
> ...

> 2015-02-18  Uros Bizjak  <ubizjak@gmail.com>
>
>      Backport from mainline
>      2013-09-08  Richard Sandiford  <rdsandiford@googlemail.com>
>
>      * ira.c (update_equiv_regs): Only call set_paradoxical_subreg
>      for non-debug insns.
>      * lra.c (new_insn_reg): Take the containing insn as a parameter.
>      Only modify lra_reg_info[].biggest_mode if it's non-debug insn.
>      (collect_non_operand_hard_regs, add_regs_to_insn_regno_info): Update
>      accordingly.
>
> testsuite/ChangeLog:
>
> 2015-02-18  Uros Bizjak  <ubizjak@gmail.com>
>
>      Backport from mainline
>      2013-09-08  Richard Sandiford  <rdsandiford@googlemail.com>
>
>      * g++.dg/debug/ra1.C: New test.
>
> Patch was bootstrapped and regression tested on 86_64-linux-gnu
> {,-m32} and alpha-linux-gnu, where it fixes all bootstrap comparison
> failures.
>
> The results are at [3], gfortran failures will be fixed by alias.c
> backport, after the bootstrap problem is cured.
>
> OK for branch?
>
>
Yes, Uros.  Thanks of working on this.
diff mbox

Patch

--- expr.gkd    2015-02-17 17:53:06.785223764 +0100
+++ expr.gk.gkd 2015-02-17 17:53:11.504169052 +0100
@@ -152249,17 +152249,15 @@ 
 (insn:TI# 0 0 (set (reg:DI 2 $2)
         (sign_extend:DI (mem:SI (reg/v/f:DI 9 $9 [orig:261 exp ]
[261]) [  S4 A64])))
../../gcc-svn/branches/gcc-4_8-branch/gcc/expr.c:6342#
{*extendsidi2_1}
      (nil))
+(insn:TI# 0 0 (set (reg:DI 4 $4)
+        (sign_extend:DI (mem/c:SI (plus:DI (reg/f:DI 30 $30)
+                    (const_int 144 [0x90])) [  S4 A64])))
../../gcc-svn/branches/gcc-4_8-branch/gcc/expr.c:6341#
{*extendsidi2_1}
+     (nil))
 (insn:TI# 0 0 (set (mem/c:DI (plus:DI (reg/f:DI 30 $30)
                 (const_int 80 [0x50])) [ %sfp+0 S8 A64])
         (reg:DI 19 $19 [ bitregion_start ]))
../../gcc-svn/branches/gcc-4_8-branch/gcc/expr.c:6341# {*movdi}
      (expr_list:REG_DEAD (reg:DI 19 $19 [ bitregion_start ])
         (nil)))
-(insn:TI# 0 0 (set (reg:DI 19 $19)
-        (sign_extend:DI (mem/c:SI (plus:DI (reg/f:DI 30 $30)
-                    (const_int 144 [0x90])) [  S4 A64])))