@@ -54,7 +54,3 @@
&usb0 {
status = "okay";
};
-
-&usb1 {
- status = "okay";
-};
@@ -119,18 +119,30 @@
status = "ok";
};
- usb0: usb@5a800100 {
+ usb2: usb@5a800100 {
compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
};
- usb1: usb@5a810100 {
+ usb3: usb@5a810100 {
compatible = "panasonic,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
};
+ usb0: usb@65a00000 {
+ compatible = "panasonic,uniphier-xhci", "generic-xhci";
+ status = "disabled";
+ reg = <0x65a00000 0x100>;
+ };
+
+ usb1: usb@65c00000 {
+ compatible = "panasonic,uniphier-xhci", "generic-xhci";
+ status = "disabled";
+ reg = <0x65c00000 0x100>;
+ };
+
nand: nand@68000000 {
compatible = "denali,denali-nand-dt";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
Each USB port corresponds to the following IP core: port0: xHCI (0x65a00000) SS+HS port1: xHCI (0x65c00000) HS (SS PHY is not implemented) port2: EHCI (0x5a800100) HS port3: EHCI (0x5a810100) HS Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> --- arch/arm/dts/uniphier-ph1-pro4-ref.dts | 4 ---- arch/arm/dts/uniphier-ph1-pro4.dtsi | 16 ++++++++++++++-- 2 files changed, 14 insertions(+), 6 deletions(-)