Message ID | 1423734573-3403-1-git-send-email-yamada.m@jp.panasonic.com |
---|---|
State | Accepted |
Delegated to: | Simon Glass |
Headers | show |
On 12 February 2015 at 02:49, Masahiro Yamada <yamada.m@jp.panasonic.com> wrote: > [ imported from Linux Kernel, commit 74981fb81d83 ] > Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> > Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Simon Glass <sjg@chromium.org>
On 17 February 2015 at 20:08, Simon Glass <sjg@chromium.org> wrote: > On 12 February 2015 at 02:49, Masahiro Yamada <yamada.m@jp.panasonic.com> wrote: >> [ imported from Linux Kernel, commit 74981fb81d83 ] >> Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> >> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> >> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> > > Acked-by: Simon Glass <sjg@chromium.org> Applied to u-boot-dm, thanks!
diff --git a/doc/device-tree-bindings/gpio/gpio.txt b/doc/device-tree-bindings/gpio/gpio.txt index b9bd1d6..f7a158d 100644 --- a/doc/device-tree-bindings/gpio/gpio.txt +++ b/doc/device-tree-bindings/gpio/gpio.txt @@ -69,7 +69,8 @@ GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller. ---------------------------------- A gpio-specifier should contain a flag indicating the GPIO polarity; active- -high or active-low. If it does, the follow best practices should be followed: +high or active-low. If it does, the following best practices should be +followed: The gpio-specifier's polarity flag should represent the physical level at the GPIO controller that achieves (or represents, for inputs) a logically asserted @@ -147,7 +148,7 @@ contains information structures as follows: numeric-gpio-range ::= <pinctrl-phandle> <gpio-base> <pinctrl-base> <count> named-gpio-range ::= <pinctrl-phandle> <gpio-base> '<0 0>' - gpio-phandle : phandle to pin controller node. + pinctrl-phandle : phandle to pin controller node gpio-base : Base GPIO ID in the GPIO controller pinctrl-base : Base pinctrl pin ID in the pin controller count : The number of GPIOs/pins in this range