Patchwork [1/2] ACPI: enable C2 and Turbo-mode on Nehalem notebooks on A/C

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Submitter Alex Chiang
Date Jan. 23, 2010, 6:38 a.m.
Message ID <20100123063817.GB28826@digdug.dreamhost.com>
Download mbox | patch
Permalink /patch/43669/
State Superseded
Delegated to: Andy Whitcroft
Headers show

Comments

Alex Chiang - Jan. 23, 2010, 6:38 a.m.
From: Len Brown <len.brown@intel.com>

upstream commit 5d76b6f6c17572e662f5c99c2023adae92100855

Linux has always ignored ACPI BIOS C2 with exit latency > 100 usec,
and the ACPI spec is clear that is correct FADT-supplied C2.

However, the ACPI spec explicitly states that _CST-supplied C-states
have no latency limits.

So move the 100usec C2 test out of the code shared
by FADT and _CST code-paths, and into the FADT-specific path.

This bug has not been visible until Nehalem, which advertises
a CPU-C2 worst case exit latency on servers of 205usec.
That (incorrect) figure is being used by BIOS writers
on mobile Nehalem systems for the AC configuration.
Thus, Linux ignores C2 leaving just C1, which is
saves less power, and also impacts performance
by preventing the use of turbo mode.

OriginalAuthor: Len Brown <lenb@kernel.org>
OriginalLocation: http://bugzilla.kernel.org/show_bug.cgi?id=15064
Tested-by: Alex Chiang <achiang@hp.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Alex Chiang <achiang@chizang.net>
---

 drivers/acpi/processor_idle.c |   21 +++++++++++----------
 1 files changed, 11 insertions(+), 10 deletions(-)
Andy Whitcroft - Feb. 3, 2010, 5:04 p.m.
This patch has now come to us via -stable in v2.6.32.7 and will hit our
tree with that update.

-apw
Stefan Bader - Feb. 9, 2010, 8:32 p.m.
Applied to Karmic (BugLink: https://launchpad.net/bugs/516325)

Patch

diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index 853bdb1..d1a9332 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -303,6 +303,17 @@  static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
 	pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
 	pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
 
+	/*
+	 * FADT specified C2 latency must be less than or equal to
+	 * 100 microseconds.
+	 */
+	if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
+		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
+			"C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
+		/* invalidate C2 */
+		pr->power.states[ACPI_STATE_C2].address = 0;
+	}
+
 	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 			  "lvl2[0x%08x] lvl3[0x%08x]\n",
 			  pr->power.states[ACPI_STATE_C2].address,
@@ -499,16 +510,6 @@  static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
 		return;
 
 	/*
-	 * C2 latency must be less than or equal to 100
-	 * microseconds.
-	 */
-	else if (cx->latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
-		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
-				  "latency too large [%d]\n", cx->latency));
-		return;
-	}
-
-	/*
 	 * Otherwise we've met all of our C2 requirements.
 	 * Normalize the C2 latency to expidite policy
 	 */