From patchwork Sun Feb 1 12:48:00 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chuanhong Guo X-Patchwork-Id: 435234 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.1 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9CF20140281 for ; Sun, 1 Feb 2015 23:48:43 +1100 (AEDT) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 799CE284516; Sun, 1 Feb 2015 13:46:06 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.2 required=5.0 tests=BAYES_00, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM, T_DKIM_INVALID autolearn=no version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id C7C45280735 for ; Sun, 1 Feb 2015 13:46:03 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 CL_IP_EQ_HELO_IP=-2 (check from: .gmail. - helo: .mail-pa0-f53.google. - helo-domain: .google.) FROM/MX_MATCHES_HELO(DOMAIN)=-2; rate: -8.5 Received: from mail-pa0-f53.google.com (mail-pa0-f53.google.com [209.85.220.53]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Sun, 1 Feb 2015 13:46:03 +0100 (CET) Received: by mail-pa0-f53.google.com with SMTP id kx10so71102133pab.12 for ; Sun, 01 Feb 2015 04:48:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:mime-version:content-type :content-transfer-encoding; bh=1FP7CYWAwEd0d9rveCZ6SRIJkrvv94C/UbahiUa7hZQ=; b=01i0oUA517UvFiNlCWA3l6Qf5yAqhJw08Ib099Kv4oUoFyN1EKNHKv7VyWOtogJOw4 V7+ZDIojs9HLC58JV/O2d2zlQgGAhJOnH0ecUDX4W22KbmTAhLqeoWpPgTGgQYhv54oA VM8+TIkVC1deiVx3HDj2Y9BKbwleAByTRSx8OEFY/TTJA8DLCn7mDg3/46Q7hQht+vQM +M9DesoJB4ieZay4gOW6BLYrYWmlC9fypeZx6a0bpD4iuG1Vx4LdG/PrrqpXhTliqacT 9l7Jy3L/xCII/ZMVK2UWr87JKPpbQC7jiqJlhLqFQodrnhEd8AE+hTPS/RWp4ekkGA/I Ws0g== X-Received: by 10.68.138.194 with SMTP id qs2mr22489995pbb.8.1422794910773; Sun, 01 Feb 2015 04:48:30 -0800 (PST) Received: from localhost.localdomain ([23.244.64.204]) by mx.google.com with ESMTPSA id i16sm15952881pbq.70.2015.02.01.04.48.29 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 01 Feb 2015 04:48:30 -0800 (PST) From: Chuanhong Guo To: openwrt-devel@lists.openwrt.org Date: Sun, 1 Feb 2015 07:48:00 -0500 Message-Id: <1422794880-14119-1-git-send-email-gch981213@gmail.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Subject: [OpenWrt-Devel] [PATCH] ar71xx:Add QCA953X version2 SoC support X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" From: 郭传鈜 This patch adds support for QCA953Xv2 SoC. I got this patch from QSDK here: https://www.codeaurora.org/cgit/quic/qsdk/oss/system/openwrt/tree/target/linux/ar71xx/patches-3.3/627-QCA-MIPS-ath79-add-QCA9531-version2-support.patch?h=release/banana_10.4_c1 This patch is tested on QCA9533-BL3A and everything seems to be OK. Signed-off-by: 郭传鈜 --- ...6-MIPS-ath79-add-QCA953X-version2-support.patch | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 target/linux/ar71xx/patches-3.14/736-MIPS-ath79-add-QCA953X-version2-support.patch diff --git a/target/linux/ar71xx/patches-3.14/736-MIPS-ath79-add-QCA953X-version2-support.patch b/target/linux/ar71xx/patches-3.14/736-MIPS-ath79-add-QCA953X-version2-support.patch new file mode 100644 index 0000000..0dbd737 --- /dev/null +++ b/target/linux/ar71xx/patches-3.14/736-MIPS-ath79-add-QCA953X-version2-support.patch @@ -0,0 +1,41 @@ +--- a/arch/mips/ath79/early_printk.c ++++ b/arch/mips/ath79/early_printk.c +@@ -114,7 +114,8 @@ + case REV_ID_MAJOR_AR9341: + case REV_ID_MAJOR_AR9342: + case REV_ID_MAJOR_AR9344: +- case REV_ID_MAJOR_QCA9533: ++ case REV_ID_MAJOR_QCA9533_V1: ++ case REV_ID_MAJOR_QCA9533_V2: + case REV_ID_MAJOR_QCA9556: + case REV_ID_MAJOR_QCA9558: + case REV_ID_MAJOR_TP9343: +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -152,10 +152,13 @@ + rev = id & AR934X_REV_ID_REVISION_MASK; + break; + +- case REV_ID_MAJOR_QCA9533: ++ case REV_ID_MAJOR_QCA9533_V1: ++ case REV_ID_MAJOR_QCA9533_V2: + ath79_soc = ATH79_SOC_QCA9533; + chip = "9533"; + rev = id & QCA953X_REV_ID_REVISION_MASK; ++ if (major == REV_ID_MAJOR_QCA9533_V2) ++ rev = 2; + break; + + case REV_ID_MAJOR_QCA9556: +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -709,7 +709,8 @@ + #define REV_ID_MAJOR_AR9341 0x0120 + #define REV_ID_MAJOR_AR9342 0x1120 + #define REV_ID_MAJOR_AR9344 0x2120 +-#define REV_ID_MAJOR_QCA9533 0x0140 ++#define REV_ID_MAJOR_QCA9533_V1 0x0140 ++#define REV_ID_MAJOR_QCA9533_V2 0x0160 + #define REV_ID_MAJOR_QCA9556 0x0130 + #define REV_ID_MAJOR_QCA9558 0x1130 + #define REV_ID_MAJOR_TP9343 0x0150