diff mbox

[1/4] powerpc/fsl-booke: Add device tree support for T1024/T1023 SoC

Message ID 1422517947-28722-1-git-send-email-Shengzhou.Liu@freescale.com (mailing list archive)
State Superseded
Delegated to: Scott Wood
Headers show

Commit Message

Shengzhou Liu Jan. 29, 2015, 7:52 a.m. UTC 
The T1024 SoC includes the following function and features:
- Two 64-bit Power architecture e5500 cores, up to 1.4GHz
- private 256KB L2 cache each core and shared 256KB CoreNet platform cache (CPC)
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
- Four MAC for 1G/2.5G/10G network interfaces (RGMII, SGMII, QSGMII, XFI)
- High-speed peripheral interfaces
  - Three PCI Express 2.0 controllers
- Additional peripheral interfaces
  - One SATA 2.0 controller
  - Two USB 2.0 controllers with integrated PHY
  - Enhanced secure digital host controller (SD/eSDHC/eMMC)
  - Enhanced serial peripheral interface (eSPI)
  - Four I2C controllers
  - Four 2-pin UARTs or two 4-pin UARTs
  - Integrated Flash Controller supporting NAND and NOR flash
- Two 8-channel DMA engines
- Multicore programmable interrupt controller (PIC)
- LCD interface (DIU) with 12 bit dual data rate
- QUICC Engine block supporting TDM, HDLC, and UART
- Deep Sleep power implementaion (wakeup from GPIO/Timer/Ethernet/USB)
- Support for hardware virtualization and partitioning enforcement
- QorIQ Platform's Trust Architecture 2.0

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
---
 arch/powerpc/boot/dts/fsl/t1023si-post.dtsi | 351 ++++++++++++++++++++++++++++
 arch/powerpc/boot/dts/fsl/t1024si-post.dtsi |  50 ++++
 arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi  |  88 +++++++
 3 files changed, 489 insertions(+)
 create mode 100644 arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi

Comments

Scott Wood Jan. 30, 2015, 1:19 a.m. UTC | #1 
On Thu, Jan 29, 2015 at 03:52:24PM +0800, Shengzhou Liu wrote:
> +	corenet-cf@18000 {
> +		compatible = "fsl,corenet2-cf";

While the damage has already been done by the t1040 device tree, this is
not 100% compatible with what's on t4240.  I'm not sure if it's worth
doing anything about it at this point, given that you can tell the
difference by the version register even though that register is reserved
on t4240 and simliar chips, which is what I do in
http://patchwork.ozlabs.org/patch/419911/

> +		reg = <0x18000 0x1000>;
> +		interrupts = <16 2 1 31>;
> +		fsl,ccf-num-csdids = <32>;
> +		fsl,ccf-num-snoopids = <32>;

The t1040/t1024 CCM does not have CSD/Snoop IDs.

> +	};
> +
> +	iommu@20000 {
> +		compatible = "fsl,pamu-v1.0", "fsl,pamu";
> +		reg = <0x20000 0x1000>;
> +		ranges = <0 0x20000 0x1000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		interrupts = <
> +			24 2 0 0
> +			16 2 1 30>;
> +		pamu0: pamu@0 {
> +			reg = <0 0x1000>;
> +			fsl,primary-cache-geometry = <128 1>;
> +			fsl,secondary-cache-geometry = <16 2>;
> +		};

The secondary cache has 32 entries, not 16.

Please verify all information when submitting a device tree.  Don't just
copy and paste.

> +	};
> +
> +/include/ "qoriq-mpic.dtsi"
> +
> +	guts: global-utilities@e0000 {
> +		compatible = "fsl,t1024-device-config", "fsl,qoriq-device-config-2.0";

Has anyone checked whether these "-2.0" properties make sense on
t1040/t1024?

> +/include/ "elo3-dma-0.dtsi"
> +/include/ "elo3-dma-1.dtsi"
> +
> +/include/ "qoriq-espi-0.dtsi"
> +	spi@110000 {
> +		fsl,espi-num-chipselects = <4>;
> +	};
> +
> +/include/ "qoriq-esdhc-0.dtsi"
> +	sdhc@114000 {
> +		compatible = "fsl,t1024-esdhc", "fsl,esdhc";
> +		fsl,iommu-parent = <&pamu0>;
> +		fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
> +		sdhci,auto-cmd12;
> +		no-1-8-v;
> +		sleep = <&rcpm 0x00000080>;
> +	};
> +/include/ "qoriq-i2c-0.dtsi"
> +/include/ "qoriq-i2c-1.dtsi"
> +/include/ "qoriq-duart-0.dtsi"
> +/include/ "qoriq-duart-1.dtsi"
> +/include/ "qoriq-gpio-0.dtsi"
> +	gpio@130000 {
> +		sleep = <&rcpm 0x00000040>;
> +	};
> +/include/ "qoriq-gpio-1.dtsi"
> +/include/ "qoriq-gpio-2.dtsi"
> +/include/ "qoriq-gpio-3.dtsi"
> +/include/ "qoriq-usb2-mph-0.dtsi"
> +		usb0: usb@210000 {
> +			compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
> +			fsl,iommu-parent = <&pamu0>;
> +			fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
> +			phy_type = "utmi";
> +			sleep = <&rcpm 0x00000020>;
> +			port0;
> +		};
> +/include/ "qoriq-usb2-dr-0.dtsi"
> +		usb1: usb@211000 {
> +			compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
> +			fsl,iommu-parent = <&pamu0>;
> +			fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
> +			dr_mode = "host";
> +			phy_type = "utmi";
> +			sleep = <&rcpm 0x00000010>;
> +		};
> +/include/ "qoriq-sata2-0.dtsi"
> +sata@220000 {
> +			fsl,iommu-parent = <&pamu0>;
> +			fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
> +};
> +
> +/include/ "qoriq-sec5.0-0.dtsi"
> +};

Please fix indentation.

> +/ {
> +	compatible = "fsl,T104x";

Drop this.

-Scott
Scott Wood Jan. 30, 2015, 1:24 a.m. UTC | #2 
On Thu, Jan 29, 2015 at 03:52:24PM +0800, Shengzhou Liu wrote:
> +/include/ "qoriq-i2c-0.dtsi"
> +/include/ "qoriq-i2c-1.dtsi"

t1023 has only three i2c controllers -- where do you disable the fourth? 

> +/include/ "t1023si-post.dtsi"
> +
> +/ {
> +	aliases {
> +		vga = &display;
> +		display = &display;
> +	};
> +};
> +
> +&soc {
> +	display:display@180000 {
> +		compatible = "fsl,t1024-diu", "fsl,diu";
> +		reg = <0x180000 1000>;
> +		interrupts = <74 2 0 0>;
> +	};
> +};

There are other differences between t1023 an t1024.  Where do you
describe t1024's QE?  Where do you describe the DDR and IFC differences? 
Ccan they be detected at runtime?  t1024 supports deep sleep, but t1023
doesn't -- yet you label both chips as having t1024 rcpm.

-Scott
Shengzhou Liu March 30, 2015, 11:08 a.m. UTC | #3 
> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Friday, January 30, 2015 9:20 AM
> To: Liu Shengzhou-B36685
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: Re: [1/4] powerpc/fsl-booke: Add device tree support for
> T1024/T1023 SoC
> 
> On Thu, Jan 29, 2015 at 03:52:24PM +0800, Shengzhou Liu wrote:
> > +	corenet-cf@18000 {
> > +		compatible = "fsl,corenet2-cf";
> 
> While the damage has already been done by the t1040 device tree, this is
> not 100% compatible with what's on t4240.  I'm not sure if it's worth
> doing anything about it at this point, given that you can tell the
> difference by the version register even though that register is reserved
> on t4240 and simliar chips, which is what I do in
> http://patchwork.ozlabs.org/patch/419911/

Now here "fsl,corenet2-cf" is suitable for t1024 after your t1040 patch was merged.
T1024 and t1040 have the same version of ccf.

> 
> > +		reg = <0x18000 0x1000>;
> > +		interrupts = <16 2 1 31>;
> > +		fsl,ccf-num-csdids = <32>;
> > +		fsl,ccf-num-snoopids = <32>;
> 
> The t1040/t1024 CCM does not have CSD/Snoop IDs.
Removed.


> > +/include/ "qoriq-i2c-0.dtsi"
> > +/include/ "qoriq-i2c-1.dtsi"
> 
> t1023 has only three i2c controllers -- where do you disable the fourth?

u-boot will disable the fourth i2c controller.


> > +/include/ "t1023si-post.dtsi"
> > +&soc {
> > +	display:display@180000 {
> > +		compatible = "fsl,t1024-diu", "fsl,diu";
> > +		reg = <0x180000 1000>;
> > +		interrupts = <74 2 0 0>;
> > +	};
> > +};
> 
> There are other differences between t1023 an t1024.  Where do you
> describe t1024's QE?  Where do you describe the DDR and IFC differences?
> can they be detected at runtime?  t1024 supports deep sleep, but t1023
> doesn't -- yet you label both chips as having t1024 rcpm.
> 
As QE IP block has not been upstream yet, so have to removed QE info in dts currently(same on t1040), 
DDR and IFC differences are in u-boot, not in dts.
Both t1023 and t1024 support sleep, so label both chips as having t1024 rcpm.
Only t1024 has deep sleep, the difference is identified in *.c not in dts (confirmed with deep sleep owner).
Scott Wood March 30, 2015, 11 p.m. UTC | #4 
On Mon, 2015-03-30 at 06:08 -0500, Liu Shengzhou-B36685 wrote:
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Friday, January 30, 2015 9:20 AM
> > To: Liu Shengzhou-B36685
> > Cc: linuxppc-dev@lists.ozlabs.org
> > Subject: Re: [1/4] powerpc/fsl-booke: Add device tree support for
> > T1024/T1023 SoC
> > 
> > On Thu, Jan 29, 2015 at 03:52:24PM +0800, Shengzhou Liu wrote:
> > > +	corenet-cf@18000 {
> > > +		compatible = "fsl,corenet2-cf";
> > 
> > While the damage has already been done by the t1040 device tree, this is
> > not 100% compatible with what's on t4240.  I'm not sure if it's worth
> > doing anything about it at this point, given that you can tell the
> > difference by the version register even though that register is reserved
> > on t4240 and simliar chips, which is what I do in
> > http://patchwork.ozlabs.org/patch/419911/
> 
> Now here "fsl,corenet2-cf" is suitable for t1024 after your t1040 patch was merged.
> T1024 and t1040 have the same version of ccf.

I wouldn't call it "suitable", just that there's a workaround for
existing badness.

> > > +/include/ "t1023si-post.dtsi"
> > > +&soc {
> > > +	display:display@180000 {
> > > +		compatible = "fsl,t1024-diu", "fsl,diu";
> > > +		reg = <0x180000 1000>;
> > > +		interrupts = <74 2 0 0>;
> > > +	};
> > > +};
> > 
> > There are other differences between t1023 an t1024.  Where do you
> > describe t1024's QE?  Where do you describe the DDR and IFC differences?
> > can they be detected at runtime?  t1024 supports deep sleep, but t1023
> > doesn't -- yet you label both chips as having t1024 rcpm.
> > 
> As QE IP block has not been upstream yet,

Huh?

arch/powerpc/sysdev/qe_lib/

>  so have to removed QE info in dts currently(same on t1040), 

That's not how it works.

> DDR and IFC differences are in u-boot, not in dts.

The differences are in hardware, which is what the dts is supposed to
describe.

> Both t1023 and t1024 support sleep, so label both chips as having t1024 rcpm.

That's not how it works.

> Only t1024 has deep sleep, the difference is identified in *.c not in dts (confirmed with deep sleep owner). 

Even if the C code chooses to use SVR to identify the difference (why?),
that doesn't mean it's OK for the device tree to contain wrong
information.

-Scott
Shengzhou Liu March 31, 2015, 3:32 a.m. UTC | #5 
> > > There are other differences between t1023 an t1024.  Where do you

> > > describe t1024's QE?  Where do you describe the DDR and IFC differences?

> > > can they be detected at runtime?  t1024 supports deep sleep, but

> > > t1023 doesn't -- yet you label both chips as having t1024 rcpm.

> > >

> > As QE IP block has not been upstream yet, 

> Huh? 

> arch/powerpc/sysdev/qe_lib/


arch/powerpc/boot/dts/fsl/qoriq-tdm1.0.dtsi has not been upstream by TDM owner.
Ok, I will first send qoriq-tdm1.0.dtsi upstream in order to include QE in t1024 dts.


> > DDR and IFC differences are in u-boot, not in dts. 

> The differences are in hardware, which is what the dts is supposed to describe.


Theoretically I think so, but not all hardware details must be described in dts
as current IP driver doesn't take care of it from dts.
If so, IP owners will have to update drivers, for now let's keep as it's.    

> > Both t1023 and t1024 support sleep, so label both chips as having t1024 rcpm.

> 

> That's not how it works.

> 

> > Only t1024 has deep sleep, the difference is identified in *.c not in dts (confirmed with deep sleep owner).

> 

> Even if the C code chooses to use SVR to identify the difference (why?),

> that doesn't mean it's OK for the device tree to contain wrong information.

 
Where is the wrong information?

        rcpm: global-utilities@e2000 {
                compatible = "fsl,t1024-rcpm", "fsl,qoriq-rcpm-2.0";
                reg = <0xe2000 0x1000>;
        };

        sdhc@114000 {
                compatible = "fsl,t1024-esdhc", "fsl,esdhc";
                fsl,iommu-parent = <&pamu0>;
                fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
                sdhci,auto-cmd12;
                no-1-8-v;
                sleep = <&rcpm 0x00000080>;
        };
t1023 also supports sleep(not deep sleep), it needs the info above.
Scott Wood March 31, 2015, 3:37 a.m. UTC | #6 
On Mon, 2015-03-30 at 22:32 -0500, Liu Shengzhou-B36685 wrote:
> > > > There are other differences between t1023 an t1024.  Where do you
> > > > describe t1024's QE?  Where do you describe the DDR and IFC differences?
> > > > can they be detected at runtime?  t1024 supports deep sleep, but
> > > > t1023 doesn't -- yet you label both chips as having t1024 rcpm.
> > > >
> > > As QE IP block has not been upstream yet, 
> > Huh? 
> > arch/powerpc/sysdev/qe_lib/
> 
> arch/powerpc/boot/dts/fsl/qoriq-tdm1.0.dtsi has not been upstream by TDM owner.
> Ok, I will first send qoriq-tdm1.0.dtsi upstream in order to include QE in t1024 dts.

Thanks, but make sure there's also a binding for it.

> > > DDR and IFC differences are in u-boot, not in dts. 
> > The differences are in hardware, which is what the dts is supposed to describe.
> 
> Theoretically I think so, but not all hardware details must be described in dts

No, but all hardware should be properly identified.

> as current IP driver doesn't take care of it from dts.

The device tree describes the hardware, not the driver.

> If so, IP owners will have to update drivers, for now let's keep as it's.    

Please don't use the phrase "IP owner" in upstream discussions.  Besides
being a bad name for "maintainer", SDK maintainership isn't relevant
here.

> > > Both t1023 and t1024 support sleep, so label both chips as having t1024 rcpm.
> > 
> > That's not how it works.
> > 
> > > Only t1024 has deep sleep, the difference is identified in *.c not in dts (confirmed with deep sleep owner).
> > 
> > Even if the C code chooses to use SVR to identify the difference (why?),
> > that doesn't mean it's OK for the device tree to contain wrong information.
>  
> Where is the wrong information?
> 
>         rcpm: global-utilities@e2000 {
>                 compatible = "fsl,t1024-rcpm", "fsl,qoriq-rcpm-2.0";
>                 reg = <0xe2000 0x1000>;
>         };
> 
>         sdhc@114000 {
>                 compatible = "fsl,t1024-esdhc", "fsl,esdhc";
>                 fsl,iommu-parent = <&pamu0>;
>                 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
>                 sdhci,auto-cmd12;
>                 no-1-8-v;
>                 sleep = <&rcpm 0x00000080>;
>         };
> t1023 also supports sleep(not deep sleep), it needs the info above.

The part that's wrong is where it says "t1024".  It's not t1024 and for
rcpm it's not 100% compatible with t1024.

-Scott
diff mbox

Patch

diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
new file mode 100644
index 0000000..23fbc5d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -0,0 +1,351 @@ 
+/*
+ * T1023 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *	 notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *	 notice, this list of conditions and the following disclaimer in the
+ *	 documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *	 names of its contributors may be used to endorse or promote products
+ *	 derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&ifc {
+	#address-cells = <2>;
+	#size-cells = <1>;
+	compatible = "fsl,ifc", "simple-bus";
+	interrupts = <25 2 0 0>;
+};
+
+&pci0 {
+	compatible = "fsl,t1024-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
+	device_type = "pci";
+	#size-cells = <2>;
+	#address-cells = <3>;
+	bus-range = <0x0 0xff>;
+	interrupts = <20 2 0 0>;
+	fsl,iommu-parent = <&pamu0>;
+	pcie@0 {
+		reg = <0 0 0 0 0>;
+		#interrupt-cells = <1>;
+		#size-cells = <2>;
+		#address-cells = <3>;
+		device_type = "pci";
+		interrupts = <20 2 0 0>;
+		interrupt-map-mask = <0xf800 0 0 7>;
+		interrupt-map = <
+			/* IDSEL 0x0 */
+			0000 0 0 1 &mpic 40 1 0 0
+			0000 0 0 2 &mpic 1 1 0 0
+			0000 0 0 3 &mpic 2 1 0 0
+			0000 0 0 4 &mpic 3 1 0 0
+			>;
+	};
+};
+
+&pci1 {
+	compatible = "fsl,t1024-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
+	device_type = "pci";
+	#size-cells = <2>;
+	#address-cells = <3>;
+	bus-range = <0 0xff>;
+	interrupts = <21 2 0 0>;
+	fsl,iommu-parent = <&pamu0>;
+	pcie@0 {
+		reg = <0 0 0 0 0>;
+		#interrupt-cells = <1>;
+		#size-cells = <2>;
+		#address-cells = <3>;
+		device_type = "pci";
+		interrupts = <21 2 0 0>;
+		interrupt-map-mask = <0xf800 0 0 7>;
+		interrupt-map = <
+			/* IDSEL 0x0 */
+			0000 0 0 1 &mpic 41 1 0 0
+			0000 0 0 2 &mpic 5 1 0 0
+			0000 0 0 3 &mpic 6 1 0 0
+			0000 0 0 4 &mpic 7 1 0 0
+			>;
+	};
+};
+
+&pci2 {
+	compatible = "fsl,t1024-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie";
+	device_type = "pci";
+	#size-cells = <2>;
+	#address-cells = <3>;
+	bus-range = <0x0 0xff>;
+	interrupts = <22 2 0 0>;
+	fsl,iommu-parent = <&pamu0>;
+	pcie@0 {
+		reg = <0 0 0 0 0>;
+		#interrupt-cells = <1>;
+		#size-cells = <2>;
+		#address-cells = <3>;
+		device_type = "pci";
+		interrupts = <22 2 0 0>;
+		interrupt-map-mask = <0xf800 0 0 7>;
+		interrupt-map = <
+			/* IDSEL 0x0 */
+			0000 0 0 1 &mpic 42 1 0 0
+			0000 0 0 2 &mpic 9 1 0 0
+			0000 0 0 3 &mpic 10 1 0 0
+			0000 0 0 4 &mpic 11 1 0 0
+			>;
+	};
+};
+
+&dcsr {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "fsl,dcsr", "simple-bus";
+
+	dcsr-epu@0 {
+		compatible = "fsl,t1024-dcsr-epu", "fsl,dcsr-epu";
+		interrupts = <52 2 0 0
+			      84 2 0 0
+			      85 2 0 0>;
+		reg = <0x0 0x1000>;
+	};
+	dcsr-npc {
+		compatible = "fsl,t1024-dcsr-cnpc", "fsl,dcsr-cnpc";
+		reg = <0x1000 0x1000 0x1002000 0x10000>;
+	};
+	dcsr-nxc@2000 {
+		compatible = "fsl,dcsr-nxc";
+		reg = <0x2000 0x1000>;
+	};
+	dcsr-corenet {
+		compatible = "fsl,dcsr-corenet";
+		reg = <0x8000 0x1000 0x1A000 0x1000>;
+	};
+	dcsr-ocn@11000 {
+		compatible = "fsl,t1024-dcsr-ocn", "fsl,dcsr-ocn";
+		reg = <0x11000 0x1000>;
+	};
+	dcsr-ddr@12000 {
+		compatible = "fsl,dcsr-ddr";
+		dev-handle = <&ddr1>;
+		reg = <0x12000 0x1000>;
+	};
+	dcsr-nal@18000 {
+		compatible = "fsl,t1024-dcsr-nal", "fsl,dcsr-nal";
+		reg = <0x18000 0x1000>;
+	};
+	dcsr-rcpm@22000 {
+		compatible = "fsl,t1024-dcsr-rcpm", "fsl,dcsr-rcpm";
+		reg = <0x22000 0x1000>;
+	};
+	dcsr-snpc@30000 {
+		compatible = "fsl,t1024-dcsr-snpc", "fsl,dcsr-snpc";
+		reg = <0x30000 0x1000 0x1022000 0x10000>;
+	};
+	dcsr-snpc@31000 {
+		compatible = "fsl,t1024-dcsr-snpc", "fsl,dcsr-snpc";
+		reg = <0x31000 0x1000 0x1042000 0x10000>;
+	};
+	dcsr-cpu-sb-proxy@100000 {
+		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+		cpu-handle = <&cpu0>;
+		reg = <0x100000 0x1000 0x101000 0x1000>;
+	};
+	dcsr-cpu-sb-proxy@108000 {
+		compatible = "fsl,dcsr-e5500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
+		cpu-handle = <&cpu1>;
+		reg = <0x108000 0x1000 0x109000 0x1000>;
+	};
+};
+
+&soc {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	device_type = "soc";
+	compatible = "simple-bus";
+
+	soc-sram-error {
+		compatible = "fsl,soc-sram-error";
+		interrupts = <16 2 1 29>;
+	};
+
+	corenet-law@0 {
+		compatible = "fsl,corenet-law";
+		reg = <0x0 0x1000>;
+		fsl,num-laws = <16>;
+	};
+
+	ddr1: memory-controller@8000 {
+		compatible = "fsl,qoriq-memory-controller-v5.0",
+				"fsl,qoriq-memory-controller";
+		reg = <0x8000 0x1000>;
+		interrupts = <16 2 1 23>;
+	};
+
+	cpc: l3-cache-controller@10000 {
+		compatible = "fsl,t1024-l3-cache-controller", "cache";
+		reg = <0x10000 0x1000>;
+		interrupts = <16 2 1 27>;
+	};
+
+	corenet-cf@18000 {
+		compatible = "fsl,corenet2-cf";
+		reg = <0x18000 0x1000>;
+		interrupts = <16 2 1 31>;
+		fsl,ccf-num-csdids = <32>;
+		fsl,ccf-num-snoopids = <32>;
+	};
+
+	iommu@20000 {
+		compatible = "fsl,pamu-v1.0", "fsl,pamu";
+		reg = <0x20000 0x1000>;
+		ranges = <0 0x20000 0x1000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		interrupts = <
+			24 2 0 0
+			16 2 1 30>;
+		pamu0: pamu@0 {
+			reg = <0 0x1000>;
+			fsl,primary-cache-geometry = <128 1>;
+			fsl,secondary-cache-geometry = <16 2>;
+		};
+	};
+
+/include/ "qoriq-mpic.dtsi"
+
+	guts: global-utilities@e0000 {
+		compatible = "fsl,t1024-device-config", "fsl,qoriq-device-config-2.0";
+		reg = <0xe0000 0xe00>;
+		fsl,has-rstcr;
+		fsl,liodn-bits = <12>;
+	};
+
+	clockgen: global-utilities@e1000 {
+		compatible = "fsl,t1024-clockgen", "fsl,qoriq-clockgen-2.0",
+				   "fixed-clock";
+		reg = <0xe1000 0x1000>;
+		clock-output-names = "sysclk";
+		#clock-cells = <0>;
+
+		#address-cells = <1>;
+		#size-cells = <1>;
+		pll0: pll0@800 {
+			#clock-cells = <1>;
+			reg = <0x800 4>;
+			compatible = "fsl,core-pll-clock";
+			clocks = <&clockgen>;
+			clock-output-names = "pll0", "pll0-div2";
+		};
+		mux0: mux0@0 {
+			#clock-cells = <0>;
+			reg = <0x0 4>;
+			compatible = "fsl,core-mux-clock";
+			clocks = <&pll0 0>, <&pll0 1>;
+			clock-names = "pll0_0", "pll0_1";
+			clock-output-names = "cmux0";
+		};
+		mux1: mux1@20 {
+			#clock-cells = <0>;
+			reg = <0x20 4>;
+			compatible = "fsl,core-mux-clock";
+			clocks = <&pll0 0>, <&pll0 1>;
+			clock-names = "pll0_0", "pll0_1";
+			clock-output-names = "cmux1";
+		};
+	};
+
+	rcpm: global-utilities@e2000 {
+		compatible = "fsl,t1024-rcpm", "fsl,qoriq-rcpm-2.0";
+		reg = <0xe2000 0x1000>;
+	};
+
+	sfp: sfp@e8000 {
+		compatible = "fsl,t1024-sfp";
+		reg	   = <0xe8000 0x1000>;
+	};
+
+	serdes: serdes@ea000 {
+		compatible = "fsl,t1024-serdes";
+		reg	   = <0xea000 0x4000>;
+	};
+
+	scfg: global-utilities@fc000 {
+		compatible = "fsl,t1024-scfg";
+		reg = <0xfc000 0x1000>;
+	};
+
+/include/ "elo3-dma-0.dtsi"
+/include/ "elo3-dma-1.dtsi"
+
+/include/ "qoriq-espi-0.dtsi"
+	spi@110000 {
+		fsl,espi-num-chipselects = <4>;
+	};
+
+/include/ "qoriq-esdhc-0.dtsi"
+	sdhc@114000 {
+		compatible = "fsl,t1024-esdhc", "fsl,esdhc";
+		fsl,iommu-parent = <&pamu0>;
+		fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
+		sdhci,auto-cmd12;
+		no-1-8-v;
+		sleep = <&rcpm 0x00000080>;
+	};
+/include/ "qoriq-i2c-0.dtsi"
+/include/ "qoriq-i2c-1.dtsi"
+/include/ "qoriq-duart-0.dtsi"
+/include/ "qoriq-duart-1.dtsi"
+/include/ "qoriq-gpio-0.dtsi"
+	gpio@130000 {
+		sleep = <&rcpm 0x00000040>;
+	};
+/include/ "qoriq-gpio-1.dtsi"
+/include/ "qoriq-gpio-2.dtsi"
+/include/ "qoriq-gpio-3.dtsi"
+/include/ "qoriq-usb2-mph-0.dtsi"
+		usb0: usb@210000 {
+			compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph";
+			fsl,iommu-parent = <&pamu0>;
+			fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
+			phy_type = "utmi";
+			sleep = <&rcpm 0x00000020>;
+			port0;
+		};
+/include/ "qoriq-usb2-dr-0.dtsi"
+		usb1: usb@211000 {
+			compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
+			fsl,iommu-parent = <&pamu0>;
+			fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
+			dr_mode = "host";
+			phy_type = "utmi";
+			sleep = <&rcpm 0x00000010>;
+		};
+/include/ "qoriq-sata2-0.dtsi"
+sata@220000 {
+			fsl,iommu-parent = <&pamu0>;
+			fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
+};
+
+/include/ "qoriq-sec5.0-0.dtsi"
+};
diff --git a/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
new file mode 100644
index 0000000..cdc570d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
@@ -0,0 +1,50 @@ 
+/*
+ * T1024 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "t1023si-post.dtsi"
+
+/ {
+	aliases {
+		vga = &display;
+		display = &display;
+	};
+};
+
+&soc {
+	display:display@180000 {
+		compatible = "fsl,t1024-diu", "fsl,diu";
+		reg = <0x180000 1000>;
+		interrupts = <74 2 0 0>;
+	};
+};
diff --git a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
new file mode 100644
index 0000000..7e513b7
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
@@ -0,0 +1,88 @@ 
+/*
+ * T1024/T1023 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *	 notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *	 notice, this list of conditions and the following disclaimer in the
+ *	 documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *	 names of its contributors may be used to endorse or promote products
+ *	 derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/include/ "e5500_power_isa.dtsi"
+
+/ {
+	compatible = "fsl,T104x";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&mpic>;
+
+	aliases {
+		ccsr = &soc;
+		dcsr = &dcsr;
+
+		dma0 = &dma0;
+		dma1 = &dma1;
+		serial0 = &serial0;
+		serial1 = &serial1;
+		serial2 = &serial2;
+		serial3 = &serial3;
+		pci0 = &pci0;
+		pci1 = &pci1;
+		pci2 = &pci2;
+		usb0 = &usb0;
+		usb1 = &usb1;
+		sdhc = &sdhc;
+
+		crypto = &crypto;
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: PowerPC,e5500@0 {
+			device_type = "cpu";
+			reg = <0>;
+			clocks = <&mux0>;
+			next-level-cache = <&L2_1>;
+			L2_1: l2-cache {
+				next-level-cache = <&cpc>;
+			};
+		};
+		cpu1: PowerPC,e5500@1 {
+			device_type = "cpu";
+			reg = <1>;
+			clocks = <&mux1>;
+			next-level-cache = <&L2_2>;
+			L2_2: l2-cache {
+				next-level-cache = <&cpc>;
+			};
+		};
+	};
+};