| Message ID | 1422321801-6743-18-git-send-email-sjg@chromium.org |
|---|---|
| State | Superseded |
| Delegated to: | Simon Glass |
| Headers | show |
Hi Simon, On Tue, Jan 27, 2015 at 9:23 AM, Simon Glass <sjg@chromium.org> wrote: > This avoids a warning in the Realtek Ethernet driver. The value may not > matter on x86. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > arch/x86/include/asm/cache.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h > index 508b63f..fff1edd 100644 > --- a/arch/x86/include/asm/cache.h > +++ b/arch/x86/include/asm/cache.h > @@ -7,6 +7,8 @@ > #ifndef __X86_CACHE_H__ > #define __X86_CACHE_H__ > > +#define CONFIG_SYS_CACHELINE_SIZE 16 I think we should either fix the Realtek ethernet driver, or just move this '#define CONFIG_SYS_CACHELINE_SIZE 16' to include/configs/board.h as a workaround. Simply defining cache line size to 16 to avoid the driver warning does not look good to me, esecially it is not a correct number in a generic arch header file. > + > /* > * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise > * use 64-bytes, a safe default for x86. > -- Regards, Bin
diff --git a/arch/x86/include/asm/cache.h b/arch/x86/include/asm/cache.h index 508b63f..fff1edd 100644 --- a/arch/x86/include/asm/cache.h +++ b/arch/x86/include/asm/cache.h @@ -7,6 +7,8 @@ #ifndef __X86_CACHE_H__ #define __X86_CACHE_H__ +#define CONFIG_SYS_CACHELINE_SIZE 16 + /* * If CONFIG_SYS_CACHELINE_SIZE is defined use it for DMA alignment. Otherwise * use 64-bytes, a safe default for x86.
This avoids a warning in the Realtek Ethernet driver. The value may not matter on x86. Signed-off-by: Simon Glass <sjg@chromium.org> --- arch/x86/include/asm/cache.h | 2 ++ 1 file changed, 2 insertions(+)