| Message ID | 1422321801-6743-7-git-send-email-sjg@chromium.org |
|---|---|
| State | Superseded |
| Delegated to: | Simon Glass |
| Headers | show |
On Tue, Jan 27, 2015 at 9:23 AM, Simon Glass <sjg@chromium.org> wrote: > Add a driver which locates the available XHCI controllers on the PCI bus > and makes them available. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > drivers/usb/host/Makefile | 1 + > drivers/usb/host/xhci-pci.c | 60 +++++++++++++++++++++++++++++++++++++++++++++ > 2 files changed, 61 insertions(+) > create mode 100644 drivers/usb/host/xhci-pci.c > > diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile > index c11b551..66d6e9a 100644 > --- a/drivers/usb/host/Makefile > +++ b/drivers/usb/host/Makefile > @@ -47,6 +47,7 @@ obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o > obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o > obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o > obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o > +obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o > > # designware > obj-$(CONFIG_USB_DWC2) += dwc2.o > diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c > new file mode 100644 > index 0000000..361fcce > --- /dev/null > +++ b/drivers/usb/host/xhci-pci.c > @@ -0,0 +1,60 @@ > +/* > + * Copyright (c) 2015, Google, Inc > + * Written by Simon Glass <sjg@chromium.org> > + * All rights reserved. > + * > + * SPDX-License-Identifier: GPL-2.0 > + */ > + > +#include <common.h> > +#include <errno.h> > +#include <pci.h> > +#include <usb.h> > + > +#include "xhci.h" > + > +/* > + * Create the appropriate control structures to manage a new XHCI host > + * controller. > + */ > +int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr, > + struct xhci_hcor **ret_hcor) > +{ > + struct xhci_hccr *hccr; > + struct xhci_hcor *hcor; > + pci_dev_t pdev; > + uint32_t cmd; > + int len; > + > + pdev = pci_find_class(PCI_CLASS_SERIAL_USB_XHCI, index); > + if (pdev < 0) { > + printf("XHCI host controller not found\n"); > + return -1; > + } > + > + hccr = (struct xhci_hccr *)pci_map_bar(pdev, > + PCI_BASE_ADDRESS_0, PCI_REGION_MEM); > + len = HC_LENGTH(xhci_readl(&hccr->cr_capbase)); > + hcor = (struct xhci_hcor *)((uint32_t)hccr + len); > + > + debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n", > + (uint32_t)hccr, (uint32_t)hcor, len); > + > + *ret_hccr = hccr; > + *ret_hcor = hcor; > + > + /* enable busmaster */ > + pci_read_config_dword(pdev, PCI_COMMAND, &cmd); > + cmd |= PCI_COMMAND_MASTER; > + pci_write_config_dword(pdev, PCI_COMMAND, cmd); > + > + return 0; > +} > + > +/* > + * Destroy the appropriate control structures corresponding * to the XHCI host > + * controller > + */ > +void xhci_hcd_stop(int index) > +{ > +} > -- Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On Tuesday, January 27, 2015 at 02:23:04 AM, Simon Glass wrote: > Add a driver which locates the available XHCI controllers on the PCI bus > and makes them available. > > Signed-off-by: Simon Glass <sjg@chromium.org> Hi! Which xhci controllers did you test with this patch and on which platform please? Is it just the minnow max + the integrated usb 3.0 controller on it? I recall I tried this, but had trouble getting the xhci-pci going on MX6 with a PCIe card with renesas controller. Thanks for working on this ! Best regards, Marek Vasut
Hi Marek, On 27 January 2015 at 10:57, Marek Vasut <marex@denx.de> wrote: > On Tuesday, January 27, 2015 at 02:23:04 AM, Simon Glass wrote: >> Add a driver which locates the available XHCI controllers on the PCI bus >> and makes them available. >> >> Signed-off-by: Simon Glass <sjg@chromium.org> > > Hi! > > Which xhci controllers did you test with this patch and on which platform > please? Is it just the minnow max + the integrated usb 3.0 controller on > it? I recall I tried this, but had trouble getting the xhci-pci going on > MX6 with a PCIe card with renesas controller. > > Thanks for working on this ! I tested it on an Intel controller (MinnowMax board). As mentioned in the cover letter it doesn't actually work, but I suspect that could be an XHCI stack issue. Not 100% sure though. At least this is a starting point. Regards, Simon
On Tuesday, January 27, 2015 at 09:52:14 PM, Simon Glass wrote: > Hi Marek, Hi! > On 27 January 2015 at 10:57, Marek Vasut <marex@denx.de> wrote: > > On Tuesday, January 27, 2015 at 02:23:04 AM, Simon Glass wrote: > >> Add a driver which locates the available XHCI controllers on the PCI bus > >> and makes them available. > >> > >> Signed-off-by: Simon Glass <sjg@chromium.org> > > > > Hi! > > > > Which xhci controllers did you test with this patch and on which platform > > please? Is it just the minnow max + the integrated usb 3.0 controller on > > it? I recall I tried this, but had trouble getting the xhci-pci going on > > MX6 with a PCIe card with renesas controller. > > > > Thanks for working on this ! > > I tested it on an Intel controller (MinnowMax board). As mentioned in > the cover letter it doesn't actually work, but I suspect that could be > an XHCI stack issue. Not 100% sure though. At least this is a starting > point. Ah, I must have missed that, sorry. Good luck with this USB3 stuff! Best regards, Marek Vasut
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index c11b551..66d6e9a 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -47,6 +47,7 @@ obj-$(CONFIG_USB_XHCI) += xhci.o xhci-mem.o xhci-ring.o obj-$(CONFIG_USB_XHCI_KEYSTONE) += xhci-keystone.o obj-$(CONFIG_USB_XHCI_EXYNOS) += xhci-exynos5.o obj-$(CONFIG_USB_XHCI_OMAP) += xhci-omap.o +obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o # designware obj-$(CONFIG_USB_DWC2) += dwc2.o diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c new file mode 100644 index 0000000..361fcce --- /dev/null +++ b/drivers/usb/host/xhci-pci.c @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2015, Google, Inc + * Written by Simon Glass <sjg@chromium.org> + * All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <errno.h> +#include <pci.h> +#include <usb.h> + +#include "xhci.h" + +/* + * Create the appropriate control structures to manage a new XHCI host + * controller. + */ +int xhci_hcd_init(int index, struct xhci_hccr **ret_hccr, + struct xhci_hcor **ret_hcor) +{ + struct xhci_hccr *hccr; + struct xhci_hcor *hcor; + pci_dev_t pdev; + uint32_t cmd; + int len; + + pdev = pci_find_class(PCI_CLASS_SERIAL_USB_XHCI, index); + if (pdev < 0) { + printf("XHCI host controller not found\n"); + return -1; + } + + hccr = (struct xhci_hccr *)pci_map_bar(pdev, + PCI_BASE_ADDRESS_0, PCI_REGION_MEM); + len = HC_LENGTH(xhci_readl(&hccr->cr_capbase)); + hcor = (struct xhci_hcor *)((uint32_t)hccr + len); + + debug("XHCI-PCI init hccr 0x%x and hcor 0x%x hc_length %d\n", + (uint32_t)hccr, (uint32_t)hcor, len); + + *ret_hccr = hccr; + *ret_hcor = hcor; + + /* enable busmaster */ + pci_read_config_dword(pdev, PCI_COMMAND, &cmd); + cmd |= PCI_COMMAND_MASTER; + pci_write_config_dword(pdev, PCI_COMMAND, cmd); + + return 0; +} + +/* + * Destroy the appropriate control structures corresponding * to the XHCI host + * controller + */ +void xhci_hcd_stop(int index) +{ +}
Add a driver which locates the available XHCI controllers on the PCI bus and makes them available. Signed-off-by: Simon Glass <sjg@chromium.org> --- drivers/usb/host/Makefile | 1 + drivers/usb/host/xhci-pci.c | 60 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 drivers/usb/host/xhci-pci.c