From patchwork Sun Jan 25 23:08:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Lamparter X-Patchwork-Id: 432628 X-Patchwork-Delegate: blogic@openwrt.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.1 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 307B914015A for ; Mon, 26 Jan 2015 10:08:53 +1100 (AEDT) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 25E4928756E; Mon, 26 Jan 2015 00:06:21 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,FREEMAIL_FROM, T_DKIM_INVALID autolearn=unavailable version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 1DA1628B89E for ; Mon, 26 Jan 2015 00:06:04 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 CL_IP_EQ_HELO_IP=-2 (check from: .googlemail. - helo: .mail-we0-f177.google. - helo-domain: .google.) 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[217.248.178.167]) by mx.google.com with ESMTPSA id u17sm4838573wij.2.2015.01.25.15.08.25 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 25 Jan 2015 15:08:26 -0800 (PST) Received: from localhost.daheim ([127.0.0.1] helo=debian64.localnet) by debian64 with esmtps (TLS1.0:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.84) (envelope-from ) id 1YFWI4-00078O-6k; Mon, 26 Jan 2015 00:08:24 +0100 From: Christian Lamparter To: OpenWrt Development List Date: Mon, 26 Jan 2015 00:08:23 +0100 Message-ID: <4763209.vB1pHZaPAT@debian64> User-Agent: KMail/4.14.2 (Linux/3.19.0-rc5-wl+; KDE/4.14.2; x86_64; ; ) MIME-Version: 1.0 Subject: [OpenWrt-Devel] [PATCH] ralink: fix USB host function for Intenso M2M X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" The ubootloader of the M2M sets the reset bits for both USB device and USB host during initialization (to save a few mA of power during boot). However, for the usb<->sata bridge to be properly detected, it is necessary to clear both reset bits as otherwise the kernel logs will just be filled with: usb 1-1: device descriptor read/64, error -145 ... Signed-off-by: Christian Lamparter --- This is the least intrusive version of the patch I could come up with. It looks like the ralink-phy.c could use some work. i.e.: +// reset_control_assert(rstdev); +// reset_control_assert(rsthost); looks like someone tried to play with the reset signals. but disabled it again? + if (OTG_STATE_B_HOST) { The condition (OTG_STATE_B_HOST) is always true?! What about OTG? Is it not supported? Thing is, I only have this RT5350 device and I'm looking for something which makes use of the USB- OTG feature (The current code looks a bit weird, does it even work?). So, can anybody tell me a reliable, inexpensive and easy to open/play with device? Regards, Christian --- .../ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch b/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch index 9920afb..b5c199a 100644 --- a/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch +++ b/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch @@ -37,7 +37,7 @@ Signed-off-by: John Crispin +obj-$(CONFIG_RALINK_USBPHY) += ralink-phy.o --- /dev/null +++ b/drivers/usb/phy/ralink-phy.c -@@ -0,0 +1,191 @@ +@@ -0,0 +1,193 @@ +/* + * Copyright (C) 2013 John Crispin + * @@ -103,6 +103,8 @@ Signed-off-by: John Crispin + rt_sysc_m32(0, RT_SYSCFG1_USB0_HOST_MODE, RT_SYSC_REG_SYSCFG1); + if (!IS_ERR(rsthost)) + reset_control_deassert(rsthost); ++ if (!IS_ERR(rstdev)) ++ reset_control_deassert(rstdev); + } else { + rt_sysc_m32(RT_SYSCFG1_USB0_HOST_MODE, 0, RT_SYSC_REG_SYSCFG1); + if (!IS_ERR(rstdev))