[OpenWrt-Devel] ralink: fix USB host function for Intenso M2M
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Message ID 4763209.vB1pHZaPAT@debian64
State Accepted
Delegated to: John Crispin
Headers show

Commit Message

Christian Lamparter Jan. 25, 2015, 11:08 p.m. UTC
The ubootloader of the M2M sets the reset bits for
both USB device and USB host during initialization
(to save a few mA of power during boot).

However, for the usb<->sata bridge to be properly
detected, it is necessary to clear both reset bits
as otherwise the kernel logs will just be filled
with:

usb 1-1: device descriptor read/64, error -145
...

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
---
This is the least intrusive version of the patch I could come
up with. It looks like the ralink-phy.c could use some work.

i.e.: 

+//             reset_control_assert(rstdev);
+//             reset_control_assert(rsthost);
looks like someone tried to play with the reset signals.
but disabled it again?

+               if (OTG_STATE_B_HOST) {
The condition (OTG_STATE_B_HOST) is always true?! What about OTG?
Is it not supported?

Thing is, I only have this RT5350 device and I'm
looking for something which makes use of the USB-
OTG feature (The current code looks a bit weird,
does it even work?). So, can anybody tell me a
reliable, inexpensive and easy to open/play with
device?

Regards,
Christian
---
 .../ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch      | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Patch
diff mbox

diff --git a/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch b/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch
index 9920afb..b5c199a 100644
--- a/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch
+++ b/target/linux/ramips/patches-3.14/0037-USB-phy-add-ralink-SoC-driver.patch
@@ -37,7 +37,7 @@  Signed-off-by: John Crispin <blogic@openwrt.org>
 +obj-$(CONFIG_RALINK_USBPHY)		+= ralink-phy.o
 --- /dev/null
 +++ b/drivers/usb/phy/ralink-phy.c
-@@ -0,0 +1,191 @@
+@@ -0,0 +1,193 @@
 +/*
 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
 + *
@@ -103,6 +103,8 @@  Signed-off-by: John Crispin <blogic@openwrt.org>
 +			rt_sysc_m32(0, RT_SYSCFG1_USB0_HOST_MODE, RT_SYSC_REG_SYSCFG1);
 +			if (!IS_ERR(rsthost))
 +				reset_control_deassert(rsthost);
++			if (!IS_ERR(rstdev))
++				reset_control_deassert(rstdev);
 +		} else {
 +			rt_sysc_m32(RT_SYSCFG1_USB0_HOST_MODE, 0, RT_SYSC_REG_SYSCFG1);
 +			if (!IS_ERR(rstdev))