From patchwork Mon Jan 19 15:47:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Schwierzeck X-Patchwork-Id: 430571 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.1 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 154B314016A for ; Tue, 20 Jan 2015 02:47:43 +1100 (AEDT) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id CA1D6280172; Mon, 19 Jan 2015 16:45:15 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00,FREEMAIL_FROM, T_DKIM_INVALID autolearn=unavailable version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 335B52800D4 for ; Mon, 19 Jan 2015 16:45:12 +0100 (CET) X-policyd-weight: using cached result; rate: -8.5 Received: from mail-wi0-f181.google.com (mail-wi0-f181.google.com [209.85.212.181]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Mon, 19 Jan 2015 16:45:11 +0100 (CET) Received: by mail-wi0-f181.google.com with SMTP id fb4so4794985wid.2 for ; Mon, 19 Jan 2015 07:47:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=Q3OjHQn29W+0Zr5/bW2bGnicbheGX71nZAPzAJCHwIs=; b=nUfVjSfgoqqk8+4ZQ9nWbsAkpC2cazG+unVTdN+oTc93i5ls5wCQAGewRy75X5DNL3 oujoioY2t3Xgo+zNhmgQ9FDWjxQZP/6BkirJPOZpOw4AoZCL9GqjZeGV+gCwaxxObb1n 09131fLB/xlmt8poMhAsbSuXAMkRR9lBofSl+keE74kneBwWSSc3yLgnKJbpXUdTIvKa 2VC2HDkV7VqPjx9LK3kLxwlPNAkvRJMU9EiknjNy+qIxfUKwmDLW4qiCoTh4+zJo/FDO VTyH2mtDTrJ8+oQPPi9SZPg1TsWvCt7VBdaR4vaNgm4jFyfID4CPS68y0Asvz3cMesX3 OopQ== MIME-Version: 1.0 X-Received: by 10.180.95.97 with SMTP id dj1mr36223360wib.43.1421682447741; Mon, 19 Jan 2015 07:47:27 -0800 (PST) Received: by 10.180.89.67 with HTTP; Mon, 19 Jan 2015 07:47:27 -0800 (PST) In-Reply-To: <1421678697.25187.27.camel@merveille.lan> References: <1421664368.25187.18.camel@merveille.lan> <54BCEFD1.6010902@conorogorman.net> <1421678697.25187.27.camel@merveille.lan> Date: Mon, 19 Jan 2015 16:47:27 +0100 Message-ID: From: Daniel Schwierzeck To: Ben Mulvihill Cc: OpenWrt Development List Subject: Re: [OpenWrt-Devel] uboot-lantiq cgu settings for ramboot image X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" 2015-01-19 15:44 GMT+01:00 Ben Mulvihill : > On Mon, 2015-01-19 at 11:51 +0000, Conor O'Gorman wrote: >> On 19/01/15 10:46, Ben Mulvihill wrote: >> > Hello, >> > >> > I am trying to build uboot-lantiq for the BT Home Hub 3A (lantiq >> > ar9), and am wondering where to initialise the cgu, in the case >> > of a ramboot image for uart booting. Normally the cgu is initialised >> > in lowlevel_init, but that code is bypassed in ramboot images. The >> > result is that the board boots with the wrong cgu settings, which >> > sends the console haywire. So far I have tried two solutions: >> >> Another option is to try and not change anything. The console is already >> configured and running. The ram does need config. >> >> I was used to seeing the ramboot version running at half clock speed, at >> least on danube, previous to ar9. >> >> Conor > > Hi Conor, > > Thanks for the reply. But with the latest uboot-lantiq, not changing > anything means that I don't get a usable console. With an older > version I do at least get a uboot console, but no linux console when > I boot openwrt. Correcting the cgu settings solves both problems. > could you try this? the UART driver calculates the baudrate from the FPI bus clock, but FPI_SEL is not available on AR9. FPI bus clock is always the same as DDR clock, Obviously a copy&paste error from VR9 code ;) diff --git a/arch/mips/cpu/mips32/arx100/cgu.c b/arch/mips/cpu/mips32/arx100/cgu.c index 6e71ee7..e0afbda 100644 --- a/arch/mips/cpu/mips32/arx100/cgu.c +++ b/arch/mips/cpu/mips32/arx100/cgu.c @@ -95,15 +95,5 @@ unsigned long ltq_get_cpu_clock(void) unsigned long ltq_get_bus_clock(void) { - u32 fpi_sel; - unsigned long clk; - - fpi_sel = ltq_cgu_sys_readl(1, CGU_SYS_FPI_SEL); - - if (fpi_sel) - clk = ltq_get_io_region_clock() / 2; - else - clk = ltq_get_io_region_clock(); - - return clk; + return ltq_get_io_region_clock(); }