From patchwork Tue Jan 12 11:58:42 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Graf X-Patchwork-Id: 42715 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 3B0DDB6F07 for ; Tue, 12 Jan 2010 23:28:29 +1100 (EST) Received: from localhost ([127.0.0.1]:39293 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NUfr7-0007YM-V6 for incoming@patchwork.ozlabs.org; Tue, 12 Jan 2010 07:28:17 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NUfOq-0005RW-7S for qemu-devel@nongnu.org; Tue, 12 Jan 2010 06:59:04 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NUfOk-0005MX-O0 for qemu-devel@nongnu.org; Tue, 12 Jan 2010 06:59:02 -0500 Received: from [199.232.76.173] (port=52118 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NUfOi-0005M8-UL for qemu-devel@nongnu.org; Tue, 12 Jan 2010 06:58:57 -0500 Received: from cantor2.suse.de ([195.135.220.15]:58126 helo=mx2.suse.de) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NUfOi-0003wd-76 for qemu-devel@nongnu.org; Tue, 12 Jan 2010 06:58:56 -0500 Received: from relay2.suse.de (charybdis-ext.suse.de [195.135.221.2]) by mx2.suse.de (Postfix) with ESMTP id A05C087567; Tue, 12 Jan 2010 12:58:54 +0100 (CET) From: Alexander Graf To: QEMU Developers Date: Tue, 12 Jan 2010 12:58:42 +0100 Message-Id: <1263297526-13518-6-git-send-email-agraf@suse.de> X-Mailer: git-send-email 1.6.0.2 In-Reply-To: <1263297526-13518-1-git-send-email-agraf@suse.de> References: <1263297526-13518-1-git-send-email-agraf@suse.de> X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.4-2.6 Cc: Aurelien Jarno Subject: [Qemu-devel] [PATCH 5/9] PPC: Make interrupts work X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The interrupt code as is didn't really work for me. I couldn't even convince Linux to take interrupt 9 in an interrupt-map. So let's do this right. Let's map all PCI interrupts to 0x1b - 0x1e. That way we're at least a small step closer to what real hardware does. I also took the interrupt pin to line conversion from OpenBIOS, which at least assures us we're compatible with our firmware :-). A dump of the PCI interrupt-map from a U2 (iBook): 00009000 00000000 00000000 00000000 ff97c528 00000034 00000001 0000d800 00000000 00000000 00000000 ff97c528 0000003f 00000001 0000c000 00000000 00000000 00000000 ff97c528 0000001b 00000001 0000c800 00000000 00000000 00000000 ff97c528 0000001c 00000001 0000d000 00000000 00000000 00000000 ff97c528 0000001d 00000001 Signed-off-by: Alexander Graf --- hw/unin_pci.c | 14 +++++++++++--- 1 files changed, 11 insertions(+), 3 deletions(-) diff --git a/hw/unin_pci.c b/hw/unin_pci.c index 1e32d63..ca980ec 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -36,22 +36,30 @@ #define UNIN_DPRINTF(fmt, ...) #endif +static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e }; + typedef struct UNINState { SysBusDevice busdev; PCIHostState host_state; } UNINState; -/* Don't know if this matches real hardware, but it agrees with OHW. */ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) { - return (irq_num + (pci_dev->devfn >> 3)) & 3; + int retval; + int devfn = pci_dev->devfn & 0x00FFFFFF; + + retval = (((devfn >> 11) & 0x1F) + irq_num) & 3; + + return retval; } static void pci_unin_set_irq(void *opaque, int irq_num, int level) { qemu_irq *pic = opaque; - qemu_set_irq(pic[irq_num + 8], level); + UNIN_DPRINTF("%s: setting INT %d = %d\n", __func__, + unin_irq_line[irq_num], level); + qemu_set_irq(pic[unin_irq_line[irq_num]], level); } static void pci_unin_save(QEMUFile* f, void *opaque)