diff mbox

ARM: tegra: Fix unit address for Cortex-A9 TWD timer

Message ID 1420719873-9820-1-git-send-email-thierry.reding@gmail.com
State Accepted, archived
Headers show

Commit Message

Thierry Reding Jan. 8, 2015, 12:24 p.m. UTC
From: Thierry Reding <treding@nvidia.com>

The Cortex-A9 TWD timer has registers at address 0x50040600, but the
unit address was 50004600, most likely a typo.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 arch/arm/boot/dts/tegra20.dtsi | 2 +-
 arch/arm/boot/dts/tegra30.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

Comments

Thierry Reding Jan. 9, 2015, 10:46 a.m. UTC | #1
On Thu, Jan 08, 2015 at 01:24:33PM +0100, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
> 
> The Cortex-A9 TWD timer has registers at address 0x50040600, but the
> unit address was 50004600, most likely a typo.
> 
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
>  arch/arm/boot/dts/tegra20.dtsi | 2 +-
>  arch/arm/boot/dts/tegra30.dtsi | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)

I've applied this to the for-3.20/dt branch.

Thierry
diff mbox

Patch

diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 06e0576df697..943c80a3ec32 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -149,7 +149,7 @@ 
 		};
 	};
 
-	timer@50004600 {
+	timer@50040600 {
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0x50040600 0x20>;
 		interrupts = <GIC_PPI 13
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index c43f59262a7c..92ec0ba59e92 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -233,7 +233,7 @@ 
 		};
 	};
 
-	timer@50004600 {
+	timer@50040600 {
 		compatible = "arm,cortex-a9-twd-timer";
 		reg = <0x50040600 0x20>;
 		interrupts = <GIC_PPI 13