From patchwork Mon Jan 11 14:49:50 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [3/4] ppc-40x: Correct decoding of zone protection bits. From: Edgar Iglesias X-Patchwork-Id: 42625 Message-Id: <1263221391-3642-4-git-send-email-edgar.iglesias@gmail.com> To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" Date: Mon, 11 Jan 2010 15:49:50 +0100 The 40x MMU has 15 zones in the ZPR register. Signed-off-by: Edgar E. Iglesias --- target-ppc/helper.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-ppc/helper.c b/target-ppc/helper.c index b233d4f..f9b5589 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -1155,7 +1155,7 @@ static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx, env->spr[SPR_40x_PID], 0, i) < 0) continue; zsel = (tlb->attr >> 4) & 0xF; - zpr = (env->spr[SPR_40x_ZPR] >> (28 - (2 * zsel))) & 0x3; + zpr = (env->spr[SPR_40x_ZPR] >> (30 - (2 * zsel))) & 0x3; LOG_SWTLB("%s: TLB %d zsel %d zpr %d rw %d attr %08x\n", __func__, i, zsel, zpr, rw, tlb->attr); /* Check execute enable bit */