diff mbox

[U-Boot] net: Add mv88e60xx support to the mv88e61xx driver

Message ID 1420510515-17884-1-git-send-email-joshua.scott@alliedtelesis.co.nz
State Changes Requested
Delegated to: Joe Hershberger
Headers show

Commit Message

Joshua Scott Jan. 6, 2015, 2:15 a.m. UTC 
The Marvell Link Street mv88e60xx is a series of FastEthernet switch
chips, some of which also support Gigabit ports. It is similar to the
mv88e61xx series which support Gigabit on all ports.

There is already a driver for the mv88e61xx in U-Boot, and this patch
updates it to also work with the mv88e60xx.

The main change that was required was the size of the port bitmaps.
Previously, 8-bit port bitmaps were in use, as the driver had only
been used with six-port mv88e61xx devices.

This has been changed so that 16-bit port bitmaps are now used, which
covers the largest port-counts available for the mv88e60xx / mv88e61xx.

Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
---

 drivers/net/phy/mv88e61xx.c | 29 +++++++++++++++++++++--------
 drivers/net/phy/mv88e61xx.h |  2 --
 include/netdev.h            | 20 +++++++++++++++-----
 3 files changed, 36 insertions(+), 15 deletions(-)

Comments

Joe Hershberger April 26, 2016, 7:19 p.m. UTC | #1 
On Mon, Jan 5, 2015 at 8:15 PM, Joshua Scott
<joshua.scott@alliedtelesis.co.nz> wrote:
> The Marvell Link Street mv88e60xx is a series of FastEthernet switch
> chips, some of which also support Gigabit ports. It is similar to the
> mv88e61xx series which support Gigabit on all ports.
>
> There is already a driver for the mv88e61xx in U-Boot, and this patch
> updates it to also work with the mv88e60xx.
>
> The main change that was required was the size of the port bitmaps.
> Previously, 8-bit port bitmaps were in use, as the driver had only
> been used with six-port mv88e61xx devices.
>
> This has been changed so that 16-bit port bitmaps are now used, which
> covers the largest port-counts available for the mv88e60xx / mv88e61xx.
>
> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Joe Hershberger April 26, 2016, 9:25 p.m. UTC | #2 
Hi Joshua,

On Tue, Apr 26, 2016 at 2:19 PM, Joe Hershberger
<joe.hershberger@gmail.com> wrote:
> On Mon, Jan 5, 2015 at 8:15 PM, Joshua Scott
> <joshua.scott@alliedtelesis.co.nz> wrote:
>> The Marvell Link Street mv88e60xx is a series of FastEthernet switch
>> chips, some of which also support Gigabit ports. It is similar to the
>> mv88e61xx series which support Gigabit on all ports.
>>
>> There is already a driver for the mv88e61xx in U-Boot, and this patch
>> updates it to also work with the mv88e60xx.
>>
>> The main change that was required was the size of the port bitmaps.
>> Previously, 8-bit port bitmaps were in use, as the driver had only
>> been used with six-port mv88e61xx devices.
>>
>> This has been changed so that 16-bit port bitmaps are now used, which
>> covers the largest port-counts available for the mv88e60xx / mv88e61xx.
>>
>> Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
>> Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
>
> Acked-by: Joe Hershberger <joe.hershberger@ni.com>

On second thought, I noticed this conflicts with the patches that
Kevin Smith has been working on. I'm build testing them along with
other patches and will send a pull request.

Please rebase this patch on top of
https://patchwork.ozlabs.org/patch/604277/ and
https://patchwork.ozlabs.org/patch/604278/

Thanks,
-Joe
diff mbox

Patch

diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c
index 302abe8..79204f3 100644
--- a/drivers/net/phy/mv88e61xx.c
+++ b/drivers/net/phy/mv88e61xx.c
@@ -215,17 +215,17 @@  static void mv88e61xx_port_vlan_config(struct mv88e61xx_config *swconfig)
 	u32 port_mask = swconfig->ports_enabled;
 
 	/* apply internal vlan config */
-	for (prt = 0; prt < MV88E61XX_MAX_PORTS_NUM; prt++) {
+	for (prt = 0; prt < swconfig->numports; prt++) {
 		/* only for enabled ports */
 		if ((1 << prt) & port_mask) {
 			/* take vlan map from swconfig */
-			u8 vlanmap = swconfig->vlancfg[prt];
+			u16 vlanmap = swconfig->vlancfg[prt];
 			/* remove disabled ports from vlan map */
 			vlanmap &= swconfig->ports_enabled;
 			/* apply vlan map to port */
 			RD_SWITCH_PORT_REG(name, prt,
 				MV88E61XX_PRT_VMAP_REG, &reg);
-			reg &= ~((1 << MV88E61XX_MAX_PORTS_NUM) - 1);
+			reg &= ~((1 << swconfig->numports) - 1);
 			reg |= vlanmap;
 			WR_SWITCH_PORT_REG(name, prt,
 				MV88E61XX_PRT_VMAP_REG, reg);
@@ -331,32 +331,44 @@  int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig)
 		return -1;
 	}
 
-	if (!(swconfig->cpuport & ((1 << 4) | (1 << 5)))) {
+	if (!(swconfig->cpuport & ((1 << 4) | (1 << 5) | (1 << 10)))) {
 		swconfig->cpuport = (1 << 5);
 		printf("Invalid cpu port config, using default port5\n");
 	}
 
 	RD_SWITCH_PORT_REG(name, 0, MII_PHYSID2, &reg);
 	switch (reg &= 0xfff0) {
+	case 0x0980:
+		idstr = "88E6096";
+		swconfig->numports = 0x0b;
+		break;
+	case 0x0990:
+		idstr = "88E6097";
+		swconfig->numports = 0x0b;
+		break;
 	case 0x1610:
 		idstr = "88E6161";
+		swconfig->numports = 0x06;
 		break;
 	case 0x1650:
 		idstr = "88E6165";
+		swconfig->numports = 0x06;
 		break;
 	case 0x1210:
 		idstr = "88E6123";
+		swconfig->numports = 0x06;
 		/* ports 2,3,4 not available */
 		swconfig->ports_enabled &= 0x023;
 		break;
 	default:
 		/* Could not detect switch id */
 		idstr = "88E61??";
+		swconfig->numports = 0x06;
 		break;
 	}
 
 	/* be sure all ports are disabled */
-	for (prt = 0; prt < MV88E61XX_MAX_PORTS_NUM; prt++) {
+	for (prt = 0; prt < swconfig->numports; prt++) {
 		RD_SWITCH_PORT_REG(name, prt, MV88E61XX_PRT_CTRL_REG, &reg);
 		reg &= ~0x3;
 		WR_SWITCH_PORT_REG(name, prt, MV88E61XX_PRT_CTRL_REG, reg);
@@ -405,12 +417,13 @@  int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig)
 		WR_SWITCH_PORT_REG(name, 5, MV88E61XX_PCS_CTRL_REG, 0x3e);
 	}
 
-	for (prt = 0; prt < MV88E61XX_MAX_PORTS_NUM; prt++) {
 
+	for (prt = 0; prt < swconfig->numports; prt++) {
 		/* configure port's PHY */
 		if (!((1 << prt) & swconfig->cpuport)) {
-			/* port 4 has phy 6, not 4 */
-			int phy = (prt == 4) ? 6 : prt;
+			/* 88e61xx: port 4 has phy 6, not 4 */
+			int phy = (swconfig->numports == 6 &&
+				   prt == 4) ? 6 : prt;
 			if (mv88361xx_powerup(swconfig, phy))
 				return -1;
 			if (mv88361xx_reverse_mdipn(swconfig, phy))
diff --git a/drivers/net/phy/mv88e61xx.h b/drivers/net/phy/mv88e61xx.h
index 9c62e4a..b289f21 100644
--- a/drivers/net/phy/mv88e61xx.h
+++ b/drivers/net/phy/mv88e61xx.h
@@ -11,8 +11,6 @@ 
 
 #include <miiphy.h>
 
-#define MV88E61XX_CPU_PORT		0x5
-
 #define MV88E61XX_PHY_TIMEOUT		100000
 
 /* port dev-addr (= port + 0x10) */
diff --git a/include/netdev.h b/include/netdev.h
index 34651ab..cbd0420 100644
--- a/include/netdev.h
+++ b/include/netdev.h
@@ -154,7 +154,9 @@  static inline int pci_eth_init(bd_t *bis)
 #if defined(CONFIG_MV88E61XX_SWITCH)
 
 /* constants for any 88E61xx switch */
-#define MV88E61XX_MAX_PORTS_NUM	6
+/* Allow enough space in the struct to fit 11 ports, as this is
+ * the number used in the mv88e60xx */
+#define MV88E61XX_MAX_PORTS_NUM 0x0b
 
 enum mv88e61xx_cfg_mdip {
 	MV88E61XX_MDIP_NOCHANGE,
@@ -180,13 +182,14 @@  enum mv88e61xx_cfg_prtstt {
 
 struct mv88e61xx_config {
 	char *name;
-	u8 vlancfg[MV88E61XX_MAX_PORTS_NUM];
+	u16 vlancfg[MV88E61XX_MAX_PORTS_NUM];
 	enum mv88e61xx_cfg_rgmiid rgmii_delay;
 	enum mv88e61xx_cfg_prtstt portstate;
 	enum mv88e61xx_cfg_ledinit led_init;
 	enum mv88e61xx_cfg_mdip mdip;
+	u32 numports;
 	u32 ports_enabled;
-	u8 cpuport;
+	u32 cpuport;
 };
 
 /*
@@ -196,10 +199,17 @@  struct mv88e61xx_config {
  */
 
 /* Switch mode : routes any port to any port */
-#define MV88E61XX_VLANCFG_SWITCH { 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F }
+#define MV88E61XX_VLANCFG_SWITCH { 0x003F, 0x003F, 0x003F, 0x003F, 0x003F, \
+				   0x003F, 0x0000, 0x0000, 0x0000, 0x0000, \
+				   0x0000 }
 
 /* Router mode: routes only CPU port 5 to/from non-CPU ports 0-4 */
-#define MV88E61XX_VLANCFG_ROUTER { 0x20, 0x20, 0x20, 0x20, 0x20, 0x1F }
+#define MV88E61XX_VLANCFG_ROUTER { 0x0020, 0x0020, 0x0020, 0x0020, 0x0020, \
+				   0x001F, 0x0000, 0x0000, 0x0000, 0x0000, \
+				   0x0000 }
+#define MV88E60XX_VLANCFG_ROUTER { 0x0400, 0x0400, 0x0400, 0x0400, 0x0400, \
+				   0x0400, 0x0400, 0x0400, 0x0400, 0x0400, \
+				   0x03ff }
 
 int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
 #endif /* CONFIG_MV88E61XX_SWITCH */