| Message ID | 1420502905.5011.1.camel@phoenix |
|---|---|
| State | Accepted |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
On 06.01.2015 01:08, Axel Lin wrote: > Current code tries to find the highest valid fifo depth by checking the value > it wrote to DW_SPI_TXFLTR. There are a few problems in current code: > 1) There is an off-by-one in dws->fifo_len setting because it assumes the latest > register write fails so the latest valid value should be fifo - 1. > 2) We know the depth could be from 2 to 256 from HW spec, so it is not necessary > to test fifo == 257. In the case fifo is 257, it means the latest valid > setting is fifo = 256. So after the for loop iteration, we should check > fifo == 2 case instead of fifo == 257 if detecting the FIFO depth fails. > This patch fixes above issues. > > Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stefan Roese <sr@denx.de> Thanks, Stefan
On 6 January 2015 at 15:28, Stefan Roese <sr@denx.de> wrote: > On 06.01.2015 01:08, Axel Lin wrote: >> >> Current code tries to find the highest valid fifo depth by checking the >> value >> it wrote to DW_SPI_TXFLTR. There are a few problems in current code: >> 1) There is an off-by-one in dws->fifo_len setting because it assumes the >> latest >> register write fails so the latest valid value should be fifo - 1. >> 2) We know the depth could be from 2 to 256 from HW spec, so it is not >> necessary >> to test fifo == 257. In the case fifo is 257, it means the latest >> valid >> setting is fifo = 256. So after the for loop iteration, we should >> check >> fifo == 2 case instead of fifo == 257 if detecting the FIFO depth >> fails. >> This patch fixes above issues. >> >> Signed-off-by: Axel Lin <axel.lin@ingics.com> > > > Acked-by: Stefan Roese <sr@denx.de> Applied to u-boot-spi/master thanks!
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c index 98c9f03..0210667 100644 --- a/drivers/spi/designware_spi.c +++ b/drivers/spi/designware_spi.c @@ -164,13 +164,13 @@ static void spi_hw_init(struct dw_spi_priv *priv) if (!priv->fifo_len) { u32 fifo; - for (fifo = 2; fifo <= 257; fifo++) { + for (fifo = 2; fifo <= 256; fifo++) { dw_writew(priv, DW_SPI_TXFLTR, fifo); if (fifo != dw_readw(priv, DW_SPI_TXFLTR)) break; } - priv->fifo_len = (fifo == 257) ? 0 : fifo; + priv->fifo_len = (fifo == 2) ? 0 : fifo - 1; dw_writew(priv, DW_SPI_TXFLTR, 0); } debug("%s: fifo_len=%d\n", __func__, priv->fifo_len);
Current code tries to find the highest valid fifo depth by checking the value it wrote to DW_SPI_TXFLTR. There are a few problems in current code: 1) There is an off-by-one in dws->fifo_len setting because it assumes the latest register write fails so the latest valid value should be fifo - 1. 2) We know the depth could be from 2 to 256 from HW spec, so it is not necessary to test fifo == 257. In the case fifo is 257, it means the latest valid setting is fifo = 256. So after the for loop iteration, we should check fifo == 2 case instead of fifo == 257 if detecting the FIFO depth fails. This patch fixes above issues. Signed-off-by: Axel Lin <axel.lin@ingics.com> --- The same fix is already applied to linux-spi tree: http://git.kernel.org/cgit/linux/kernel/git/broonie/spi.git/commit/?h=for-linus&id=d297933cc7fcfbaaf2d37570baac73287bf0357d This patch replaces my previous patch: http://lists.denx.de/pipermail/u-boot/2014-December/199228.html drivers/spi/designware_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)