From patchwork Thu Jan 7 18:46:56 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 42462 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 931CF1007D1 for ; Fri, 8 Jan 2010 06:27:25 +1100 (EST) Received: from localhost ([127.0.0.1]:45037 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NSxoO-00052o-W5 for incoming@patchwork.ozlabs.org; Thu, 07 Jan 2010 14:14:25 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NSxiL-0000Hb-0X for qemu-devel@nongnu.org; Thu, 07 Jan 2010 14:08:09 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NSxiJ-0000Gx-Bw for qemu-devel@nongnu.org; Thu, 07 Jan 2010 14:08:08 -0500 Received: from [199.232.76.173] (port=40419 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NSxiJ-0000Gn-0E for qemu-devel@nongnu.org; Thu, 07 Jan 2010 14:08:07 -0500 Received: from mx20.gnu.org ([199.232.41.8]:20717) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1NSxiH-0003zB-Sr for qemu-devel@nongnu.org; Thu, 07 Jan 2010 14:08:06 -0500 Received: from are.twiddle.net ([75.149.56.221]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NSxhS-0008P5-0Q for qemu-devel@nongnu.org; Thu, 07 Jan 2010 14:07:14 -0500 Received: by are.twiddle.net (Postfix, from userid 5000) id 593D4CBB; Thu, 7 Jan 2010 10:58:54 -0800 (PST) Message-Id: <98c9a2ae8216c2eead98e113180d06424177e54f.1262890015.git.rth@twiddle.net> In-Reply-To: References: From: Richard Henderson Date: Thu, 7 Jan 2010 10:46:56 -0800 To: qemu-devel@nongnu.org X-detected-operating-system: by mx20.gnu.org: GNU/Linux 2.6 (newer, 2) X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 1/6] tcg: Document double-word support opcodes. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The internal opcodes brcond2, add2, sub2, mulu2 were undocumented. Place these in a new section that clearly indicates that they are not to be emitted by translators. Signed-off-by: Richard Henderson --- tcg/README | 23 +++++++++++++++++++++++ 1 files changed, 23 insertions(+), 0 deletions(-) diff --git a/tcg/README b/tcg/README index e672258..3d6c170 100644 --- a/tcg/README +++ b/tcg/README @@ -323,6 +323,29 @@ st32_i64 t0, t1, offset write(t0, t1 + offset) Write 8, 16, 32 or 64 bits to host memory. +********* 64-bit target on 32-bit host support + +The following opcodes are internal to TCG. Thus they are to be implemented by +32-bit host code generators, but are not to be emitted by guest translators. +They are emitted as needed by inline functions within "tcg-op.h". + +* brcond2_i32 cond, t0_low, t0_high, t1_low, t1_high, label + +Similar to brcond, except that the 64-bit values T0 and T1 +are formed from two 32-bit arguments. + +* add2_i32 t0_low, t0_high, t1_low, t1_high, t2_low, t2_high +* sub2_i32 t0_low, t0_high, t1_low, t1_high, t2_low, t2_high + +Similar to add/sub, except that the 64-bit inputs T1 and T2 are +formed from two 32-bit arguments, and the 64-bit output T0 +is returned in two 32-bit outputs. + +* mulu2_i32 t0_low, t0_high, t1, t2 + +Similar to mul, except two 32-bit (unsigned) inputs T1 and T2 yielding +the full 64-bit product T0. The later is returned in two 32-bit outputs. + ********* QEMU specific operations * tb_exit t0