Message ID | cover.1419812185.git.horms+renesas@verge.net.au |
---|---|
State | New |
Headers | show |
Hello. On 12/29/2014 4:43 AM, Simon Horman wrote: > From: Shinobu Uehara <shinobu.uehara.xc@renesas.com> > Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> > [horms: omitted device nodes; only add clock] > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > --- > arch/arm/boot/dts/r8a7794.dtsi | 20 +++++++++++++++++++- > include/dt-bindings/clock/r8a7794-clock.h | 3 +++ > 2 files changed, 22 insertions(+), 1 deletion(-) > diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi > index 728d719..c376676 100644 > --- a/arch/arm/boot/dts/r8a7794.dtsi > +++ b/arch/arm/boot/dts/r8a7794.dtsi > @@ -293,6 +293,21 @@ > clock-output-names = "main", "pll0", "pll1", "pll3", > "lb", "qspi", "sdh", "sd0", "z"; > }; > + /* Variable factor clocks */ > + sd1_clk: sd2_clk@e6150078 { So is it SD1 or SD2 clock? > + compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; > + reg = <0 0xe6150078 0 4>; > + clocks = <&pll1_div2_clk>; > + #clock-cells = <0>; > + clock-output-names = "sd1"; > + }; > + sd2_clk: sd3_clk@e615007c { Same question... > + compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; > + reg = <0 0xe615007c 0 4>; > + clocks = <&pll1_div2_clk>; > + #clock-cells = <0>; > + clock-output-names = "sd2"; > + }; [...] WBR, Sergei
On Mon, Dec 29, 2014 at 02:14:25PM +0300, Sergei Shtylyov wrote: > Hello. > > On 12/29/2014 4:43 AM, Simon Horman wrote: > > >From: Shinobu Uehara <shinobu.uehara.xc@renesas.com> > > >Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> > >[horms: omitted device nodes; only add clock] > >Signed-off-by: Simon Horman <horms+renesas@verge.net.au> > >--- > > arch/arm/boot/dts/r8a7794.dtsi | 20 +++++++++++++++++++- > > include/dt-bindings/clock/r8a7794-clock.h | 3 +++ > > 2 files changed, 22 insertions(+), 1 deletion(-) > > >diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi > >index 728d719..c376676 100644 > >--- a/arch/arm/boot/dts/r8a7794.dtsi > >+++ b/arch/arm/boot/dts/r8a7794.dtsi > >@@ -293,6 +293,21 @@ > > clock-output-names = "main", "pll0", "pll1", "pll3", > > "lb", "qspi", "sdh", "sd0", "z"; > > }; > >+ /* Variable factor clocks */ > >+ sd1_clk: sd2_clk@e6150078 { > > So is it SD1 or SD2 clock? > > >+ compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; > >+ reg = <0 0xe6150078 0 4>; > >+ clocks = <&pll1_div2_clk>; > >+ #clock-cells = <0>; > >+ clock-output-names = "sd1"; > >+ }; > >+ sd2_clk: sd3_clk@e615007c { > > Same question... > > >+ compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock"; > >+ reg = <0 0xe615007c 0 4>; > >+ clocks = <&pll1_div2_clk>; > >+ #clock-cells = <0>; > >+ clock-output-names = "sd2"; > >+ }; > [...] Thanks, and sorry for letting that slip through. e6150078 should be sd1_clk and e615007c should be sd2_clk. And for reference sd3_clk is e615026c. I'll send an incremental patch to fix this problem.
On Mon, Dec 29, 2014 at 10:44:01AM +0900, Simon Horman wrote: > Hi Olof, Hi Kevin, Hi Arnd, > > Please consider these Renesas ARM based SoC DT updates for v3.20. > > > The following changes since commit 97bf6af1f928216fd6c5a66e8a57bfa95a659672: > > Linux 3.19-rc1 (2014-12-20 17:08:50 -0800) > > are available in the git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git tags/renesas-dt-for-v3.20 > > for you to fetch changes up to 7408d3061d2f04181820902fae6e92e4a73d5cc0: > > ARM: shmobile: r8a7791: add MLB+ clock (2014-12-23 09:18:23 +0900) > > ---------------------------------------------------------------- > Renesas ARM Based SoC DT Updates for v3.20 > > * Use clock-indices instead of deprecated renesas,clock-indices > * Prepare for r8a73a4 multiplatform support > * Increase clock coverage for r8a779[014] > * Correct r8a7779 clock usage > * Correct LAN9220 VDDVARIO voltage on ape6evm > * Correct QSPI SPI-Flash mode of lager and koelsch > * Correct flash partition label and size on koelsch > * Correct mask for GIC PPI interrupts on r8a779[14] > * Correct BSC bus range on ape6evm-reference > Thanks, merged into next/dt. -Olof