From patchwork Fri Dec 19 12:40:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: GreenWire Elektronik X-Patchwork-Id: 422870 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from arrakis.dune.hu (arrakis.dune.hu [78.24.191.176]) (using TLSv1.1 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 16FD4140079 for ; Fri, 19 Dec 2014 23:40:20 +1100 (AEDT) Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 98507283E7C; Fri, 19 Dec 2014 13:38:20 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on arrakis.dune.hu X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=BAYES_00 autolearn=unavailable version=3.3.2 Received: from arrakis.dune.hu (localhost [127.0.0.1]) by arrakis.dune.hu (Postfix) with ESMTP id 2B90D280419 for ; Fri, 19 Dec 2014 13:38:17 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 CL_IP_EQ_HELO_IP=-2 (check from: .greenwire-elektronik. - helo: .mout.kundenserver. - helo-domain: .kundenserver.) FROM/MX_MATCHES_HELO(DOMAIN)=-2; rate: -8.5 Received: from mout.kundenserver.de (mout.kundenserver.de [212.227.17.13]) by arrakis.dune.hu (Postfix) with ESMTPS for ; Fri, 19 Dec 2014 13:38:16 +0100 (CET) Received: from [192.168.0.2] ([46.223.43.50]) by mrelayeu.kundenserver.de (mreue103) with ESMTPSA (Nemesis) id 0MCx2B-1YBbsq0jMR-009de3 for ; Fri, 19 Dec 2014 13:40:07 +0100 Message-ID: <54941CA0.6080009@greenwire-elektronik.de> Date: Fri, 19 Dec 2014 13:40:00 +0100 From: GreenWire Elektronik User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.6.0 MIME-Version: 1.0 To: openwrt-devel@lists.openwrt.org X-Provags-ID: V03:K0:986EG3uPigUG+erFPex14RnpCbDiBrJ6zLNMd6bvq7p9ocdiBbZ oZoxJ8alYu6lfVV/H+uE2VcwhKB8GtpR2yuqu9m9t6TWwI2nfoSy2h5yPQ/F4r98QyBkeWm kRjAcdCveLuqDyHBn14lbd8A7/ClNU0NXXTPh3Wmx41SQAfLqD6Hzq1E2djJeb/z6KZa5j9 P88quXT/o5Fwt9jcM8KLQ== X-UI-Out-Filterresults: notjunk:1; Subject: [OpenWrt-Devel] [PATCH] [ramips] gpio-ralink.c: Fix for gpio falling interrupt mask X-BeenThere: openwrt-devel@lists.openwrt.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: OpenWrt Development List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: openwrt-devel-bounces@lists.openwrt.org Sender: "openwrt-devel" Signed-off-by: Jonas Arndt This patch fixes a wrong mask operation for the rt2880-compatible ralink devices. The mask operation reads the actual flags and then logical combines it with the pin flag it want to set. Unfortunally, for rising as for falling interrupt flags the actual flag status of the rising interrupts was used. That caused a problem if you want to use more than one falling GPIO interrupt. Now the correct (seperated) actual status is used for both, falling and rising. openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel --- b/drivers/gpio/gpio-ralink.c 2014-12-19 01:13:05.731125320 +0100 +++ b/drivers/gpio/gpio-ralink.c 2014-12-19 01:16:55.216323285 +0100 @@ -148,14 +148,16 @@ { struct ralink_gpio_chip *rg; unsigned long flags; - u32 val; + u32 valR; + u32 valF; rg = (struct ralink_gpio_chip *) d->domain->host_data; - val = rt_gpio_r32(rg, GPIO_REG_RENA); + valR = rt_gpio_r32(rg, GPIO_REG_RENA); + valF = rt_gpio_r32(rg, GPIO_REG_FENA); spin_lock_irqsave(&rg->lock, flags); - rt_gpio_w32(rg, GPIO_REG_RENA, val | (BIT(d->hwirq) & rg->rising)); - rt_gpio_w32(rg, GPIO_REG_FENA, val | (BIT(d->hwirq) & rg->falling)); + rt_gpio_w32(rg, GPIO_REG_RENA, valR | (BIT(d->hwirq) & rg->rising)); + rt_gpio_w32(rg, GPIO_REG_FENA, valF | (BIT(d->hwirq) & rg->falling)); spin_unlock_irqrestore(&rg->lock, flags); } @@ -163,14 +165,16 @@ { struct ralink_gpio_chip *rg; unsigned long flags; - u32 val; + u32 valR; + u32 valF; rg = (struct ralink_gpio_chip *) d->domain->host_data; - val = rt_gpio_r32(rg, GPIO_REG_RENA); + valR = rt_gpio_r32(rg, GPIO_REG_RENA); + valF = rt_gpio_r32(rg, GPIO_REG_FENA); spin_lock_irqsave(&rg->lock, flags); - rt_gpio_w32(rg, GPIO_REG_FENA, val & ~BIT(d->hwirq)); - rt_gpio_w32(rg, GPIO_REG_RENA, val & ~BIT(d->hwirq)); + rt_gpio_w32(rg, GPIO_REG_FENA, valR & ~BIT(d->hwirq)); + rt_gpio_w32(rg, GPIO_REG_RENA, valF & ~BIT(d->hwirq)); spin_unlock_irqrestore(&rg->lock, flags); } _______________________________________________