[OpenWrt-Devel,ramips] gpio-ralink.c: Fix for gpio falling interrupt mask

Message ID 54941CA0.6080009@greenwire-elektronik.de
State Accepted
Headers show

Commit Message

GreenWire Elektronik Dec. 19, 2014, 12:40 p.m.
Signed-off-by: Jonas Arndt <info@greenwire-elektronik.de>

This patch fixes a wrong mask operation for the rt2880-compatible ralink devices.
The mask operation reads the actual flags and then logical combines it with the pin flag it want to set.
Unfortunally, for rising as for falling interrupt flags the actual flag status of the rising interrupts was used.
That caused a problem if you want to use more than one falling GPIO interrupt.
Now the correct (seperated) actual status is used for both, falling and rising.

openwrt-devel mailing list
openwrt-devel@lists.openwrt.org
https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel

Patch

--- b/drivers/gpio/gpio-ralink.c    2014-12-19 01:13:05.731125320 +0100
+++ b/drivers/gpio/gpio-ralink.c    2014-12-19 01:16:55.216323285 +0100
@@ -148,14 +148,16 @@ 
  {
      struct ralink_gpio_chip *rg;
      unsigned long flags;
-    u32 val;
+    u32 valR;
+    u32 valF;

      rg = (struct ralink_gpio_chip *) d->domain->host_data;
-    val = rt_gpio_r32(rg, GPIO_REG_RENA);
+    valR = rt_gpio_r32(rg, GPIO_REG_RENA);
+    valF = rt_gpio_r32(rg, GPIO_REG_FENA);

      spin_lock_irqsave(&rg->lock, flags);
-    rt_gpio_w32(rg, GPIO_REG_RENA, val | (BIT(d->hwirq) & rg->rising));
-    rt_gpio_w32(rg, GPIO_REG_FENA, val | (BIT(d->hwirq) & rg->falling));
+    rt_gpio_w32(rg, GPIO_REG_RENA, valR | (BIT(d->hwirq) & rg->rising));
+    rt_gpio_w32(rg, GPIO_REG_FENA, valF | (BIT(d->hwirq) & rg->falling));
      spin_unlock_irqrestore(&rg->lock, flags);
  }

@@ -163,14 +165,16 @@ 
  {
      struct ralink_gpio_chip *rg;
      unsigned long flags;
-    u32 val;
+    u32 valR;
+    u32 valF;

      rg = (struct ralink_gpio_chip *) d->domain->host_data;
-    val = rt_gpio_r32(rg, GPIO_REG_RENA);
+    valR = rt_gpio_r32(rg, GPIO_REG_RENA);
+    valF = rt_gpio_r32(rg, GPIO_REG_FENA);

      spin_lock_irqsave(&rg->lock, flags);
-    rt_gpio_w32(rg, GPIO_REG_FENA, val & ~BIT(d->hwirq));
-    rt_gpio_w32(rg, GPIO_REG_RENA, val & ~BIT(d->hwirq));
+    rt_gpio_w32(rg, GPIO_REG_FENA, valR & ~BIT(d->hwirq));
+    rt_gpio_w32(rg, GPIO_REG_RENA, valF & ~BIT(d->hwirq));
      spin_unlock_irqrestore(&rg->lock, flags);
  }
_______________________________________________