| Message ID | 5492A8AD.1030203@marvell.com |
|---|---|
| State | New |
| Headers | show |
Hi Xingxing, On 18/12/14 10:13, Xingxing Pan wrote: > + > +(define_attr "tune_marvell_whitney" "yes,no" > + (const (if_then_else (eq_attr "tune" "marvell_whitney") > + (const_string "yes") > + (const_string "no")))) Why do you need this? The canonical way we do this in the other .md files is check for the "tune" attribute directly. > + > +(define_automaton "whitney_pipe") > + > +(define_cpu_unit "wCU1" "whitney_pipe") > +(define_cpu_unit "wCU2" "whitney_pipe") > +(define_cpu_unit "wCU3" "whitney_pipe") > +(define_cpu_unit "wCU4" "whitney_pipe") > +(define_cpu_unit "wCU5" "whitney_pipe") > +(define_cpu_unit "wCU6" "whitney_pipe") > +(define_cpu_unit "wCU7" "whitney_pipe") > +(define_cpu_unit "wCU8" "whitney_pipe") > +(define_cpu_unit "wCU9" "whitney_pipe") > +(define_cpu_unit "wCU10" "whitney_pipe") > +(define_cpu_unit "wCU11" "whitney_pipe") > +(define_cpu_unit "wCU12" "whitney_pipe") > +(define_cpu_unit "wCU13" "whitney_pipe") > + > +(define_insn_reservation "wIR1" 1 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP1")) > + "wCU1|wCU2|(wCU3+wCU4)" > +) Further to the comment above, this could be written as: +(define_insn_reservation "wIR1" 1 + (and (eq_attr "tune" "marvell_whitney") + (eq_attr "whitney_type" "wTP1")) + "wCU1|wCU2|(wCU3+wCU4)" +) Same with the other reservations in this file. Kyrill > + > +(define_insn_reservation "wIR2" 2 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP2")) > + "wCU1|wCU2|(wCU3+wCU4)" > +)
Hi Xingxin, It seems that your mail client mangled this patch, at least the following hunk doesn't apply, even when I try to get it from the web archives. Could you please resend it as an attachment perhaps? Thanks, Kyrill On 18/12/14 10:13, Xingxing Pan wrote: > diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def > index 423ee9e..b0ffbe1 100644 > --- a/gcc/config/arm/arm-cores.def > +++ b/gcc/config/arm/arm-cores.def > @@ -159,6 +159,7 @@ ARM_CORE("cortex-m7", cortexm7, > cortexm7, 7EM, > FL_LDSCHED, cortex_m7) > ARM_CORE("cortex-m4", cortexm4, cortexm4, 7EM, > FL_LDSCHED, v7m) > ARM_CORE("cortex-m3", cortexm3, cortexm3, 7M, > FL_LDSCHED, v7m) > ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4, > 7A, FL_LDSCHED, 9e) > +ARM_CORE("marvell-whitney", marvell_whitney, marvell_whitney, > 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, marvell_whitney)
On Thu, Dec 18, 2014 at 10:13 AM, Xingxing Pan <xxingpan@marvell.com> wrote: > Hi, > > This patch contains Marvell Whitney core's pipeline description. > Test on arm-linux-gnueabi and no new regression are found. > > Is it OK for trunk? I haven't had a chance to review this in detail but I think it's too late to add such an invasive patch to the backend given we are in stage4 today. Ramana > > Regards, > Xingxing > > > 2014-12-18 Xingxing Pan <xxingpan@marvell.com> > > * config/arm/arm-cores.def: Add new core marvell-whitney. > * config/arm/arm-protos.h: > (marvell_whitney_vector_element_size_is_byte): Declare. > (marvell_whitney_non_shift_with_shift_operand): Ditto. > * config/arm/arm-tables.opt: Regenerated. > * config/arm/arm-tune.md: Regenerated. > * config/arm/arm.c (arm_marvell_whitney_tune): New structure. > (arm_issue_rate): Add marvell_whitney. > (marvell_whitney_vector_element_size_is_byte): New function. > (marvell_whitney_non_shift_with_shift_operand): Ditto. > * config/arm/arm.md: Include marvell-whitney.md. > (generic_sched): Add marvell_whitney. > (generic_vfp): Ditto. > * config/arm/bpabi.h (BE8_LINK_SPEC): Add marvell-whitney. > * config/arm/t-arm (MD_INCLUDES): Add marvell-whitney.md. > * config/arm/marvell-whitney.md: New file. > * doc/invoke.texi: Document marvell-whitney. > > diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def > index 423ee9e..b0ffbe1 100644 > --- a/gcc/config/arm/arm-cores.def > +++ b/gcc/config/arm/arm-cores.def > @@ -159,6 +159,7 @@ ARM_CORE("cortex-m7", cortexm7, cortexm7, > 7EM, > FL_LDSCHED, cortex_m7) > ARM_CORE("cortex-m4", cortexm4, cortexm4, 7EM, > FL_LDSCHED, v7m) > ARM_CORE("cortex-m3", cortexm3, cortexm3, 7M, > FL_LDSCHED, v7m) > ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4, 7A, > FL_LDSCHED, 9e) > +ARM_CORE("marvell-whitney", marvell_whitney, marvell_whitney, > 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, marvell_whitney) > > /* V7 big.LITTLE implementations */ > ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7, 7A, > FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15) > diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h > index 20cfa9f..e86db1e 100644 > --- a/gcc/config/arm/arm-protos.h > +++ b/gcc/config/arm/arm-protos.h > @@ -231,6 +231,9 @@ extern void arm_order_regs_for_local_alloc (void); > > extern int arm_max_conditional_execute (); > > +extern bool marvell_whitney_vector_element_size_is_byte (rtx insn); > +extern bool marvell_whitney_non_shift_with_shift_operand (rtx insn); > + > /* Vectorizer cost model implementation. */ > struct cpu_vec_costs { > const int scalar_stmt_cost; /* Cost of any scalar operation, excluding > diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt > index 9b1886e..3371ce3 100644 > --- a/gcc/config/arm/arm-tables.opt > +++ b/gcc/config/arm/arm-tables.opt > @@ -298,6 +298,9 @@ EnumValue > Enum(processor_type) String(marvell-pj4) Value(marvell_pj4) > > EnumValue > +Enum(processor_type) String(marvell-whitney) Value(marvell_whitney) > + > +EnumValue > Enum(processor_type) String(cortex-a15.cortex-a7) Value(cortexa15cortexa7) > > EnumValue > diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md > index d300c51..c73c33c 100644 > --- a/gcc/config/arm/arm-tune.md > +++ b/gcc/config/arm/arm-tune.md > @@ -28,9 +28,10 @@ > > cortexm1smallmultiply,cortexm0smallmultiply,cortexm0plussmallmultiply, > genericv7a,cortexa5,cortexa7, > cortexa8,cortexa9,cortexa12, > - cortexa15,cortexa17,cortexr4,cortexr4f, > - cortexr5,cortexr7,cortexm7, > - cortexm4,cortexm3,marvell_pj4, > - cortexa15cortexa7,cortexa17cortexa7,cortexa53, > - cortexa57,cortexa57cortexa53" > + cortexa15,cortexa17,cortexr4, > + cortexr4f,cortexr5,cortexr7, > + cortexm7,cortexm4,cortexm3, > + marvell_pj4,marvell_whitney,cortexa15cortexa7, > + cortexa17cortexa7,cortexa53,cortexa57, > + cortexa57cortexa53" > (const (symbol_ref "((enum attr_tune) arm_tune)"))) > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index 0ec526b..183da4c 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -1914,6 +1914,25 @@ const struct tune_params arm_cortex_a9_tune = > 8 /* Maximum insns to inline > memset. */ > }; > > +const struct tune_params arm_marvell_whitney_tune = > +{ > + arm_9e_rtx_costs, > + &cortexa9_extra_costs, > + cortex_a9_sched_adjust_cost, > + 1, /* Constant limit. */ > + 5, /* Max cond insns. */ > + ARM_PREFETCH_BENEFICIAL(4,32,32), > + false, /* Prefer constant pool. */ > + arm_default_branch_cost, > + false, /* Prefer LDRD/STRD. */ > + {true, true}, /* Prefer non short > circuit. */ > + &arm_default_vec_cost, /* Vectorizer costs. */ > + false, /* Prefer Neon for > 64-bits bitops. */ > + false, false, /* Prefer 32-bit > encodings. */ > + false, /* Prefer Neon for > stringops. */ > + 8 /* Maximum insns to inline > memset. */ > +}; > + > const struct tune_params arm_cortex_a12_tune = > { > arm_9e_rtx_costs, > @@ -11608,6 +11627,49 @@ fa726te_sched_adjust_cost (rtx_insn *insn, rtx > link, rtx_insn *dep, int * cost) > return true; > } > > +/* Return true if vector element size is byte. */ > +bool > +marvell_whitney_vector_element_size_is_byte (rtx insn) > +{ > + if (GET_CODE (PATTERN (insn)) == SET) > + { > + if ((GET_MODE (SET_DEST (PATTERN (insn))) == V8QImode) || > + (GET_MODE (SET_DEST (PATTERN (insn))) == V16QImode)) > + return true; > + } > + > + return false; > +} > + > +/* Return true if INSN has shift operation but is not a shift insn. */ > +bool > +marvell_whitney_non_shift_with_shift_operand (rtx insn) > +{ > + rtx pat = PATTERN (insn); > + > + if (GET_CODE (pat) != SET) > + return false; > + > + /* Is not a shift insn. */ > + rtx rvalue = SET_SRC (pat); > + RTX_CODE code = GET_CODE (rvalue); > + if (code == ASHIFT || code == ASHIFTRT > + || code == LSHIFTRT || code == ROTATERT) > + return false; > + > + subrtx_iterator::array_type array; > + FOR_EACH_SUBRTX (iter, array, rvalue, ALL) > + { > + /* Has shift operation. */ > + RTX_CODE code = GET_CODE (*iter); > + if (code == ASHIFT || code == ASHIFTRT > + || code == LSHIFTRT || code == ROTATERT) > + return true; > + } > + > + return false; > +} > + > /* Implement TARGET_REGISTER_MOVE_COST. > > Moves between VFP_REGS and GENERAL_REGS are a single insn, but > @@ -27031,6 +27093,7 @@ arm_issue_rate (void) > { > case cortexa15: > case cortexa57: > + case marvell_whitney: > return 3; > > case cortexm7: > diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md > index 822760b..8f02743 100644 > --- a/gcc/config/arm/arm.md > +++ b/gcc/config/arm/arm.md > @@ -386,7 +386,8 @@ > arm926ejs,arm1020e,arm1026ejs,arm1136js,\ > arm1136jfs,cortexa5,cortexa7,cortexa8,\ > cortexa9,cortexa12,cortexa15,cortexa17,\ > - cortexa53,cortexm4,cortexm7,marvell_pj4") > + cortexa53,cortexm4,cortexm7,marvell_pj4,\ > + marvell_whitney") > (eq_attr "tune_cortexr4" "yes")) > (const_string "no") > (const_string "yes")))) > @@ -396,7 +397,7 @@ > (and (eq_attr "fpu" "vfp") > (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa7,\ > cortexa8,cortexa9,cortexa53,cortexm4,\ > - cortexm7,marvell_pj4") > + cortexm7,marvell_pj4,marvell_whitney") > (eq_attr "tune_cortexr4" "no")) > (const_string "yes") > (const_string "no")))) > @@ -426,6 +427,7 @@ > (include "cortex-m4-fpu.md") > (include "vfp11.md") > (include "marvell-pj4.md") > +(include "marvell-whitney.md") > > > > ;;--------------------------------------------------------------------------- > diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h > index aa93aa4..07fab0f 100644 > --- a/gcc/config/arm/bpabi.h > +++ b/gcc/config/arm/bpabi.h > @@ -68,6 +68,7 @@ > |mcpu=cortex-a15.cortex-a7 \ > |mcpu=cortex-a17.cortex-a7 \ > |mcpu=marvell-pj4 \ > + |mcpu=marvell-whitney \ > |mcpu=cortex-a53 \ > |mcpu=cortex-a57 \ > |mcpu=cortex-a57.cortex-a53 \ > @@ -96,6 +97,7 @@ > |mcpu=cortex-m0.small-multiply \ > |mcpu=cortex-m0plus.small-multiply \ > |mcpu=marvell-pj4 \ > + |mcpu=marvell-whitney \ > |mcpu=generic-armv7-a \ > |march=armv7ve \ > |march=armv7-m|mcpu=cortex-m3 \ > diff --git a/gcc/config/arm/marvell-whitney.md > b/gcc/config/arm/marvell-whitney.md > new file mode 100644 > index 0000000..57391a7 > --- /dev/null > +++ b/gcc/config/arm/marvell-whitney.md > @@ -0,0 +1,683 @@ > +;; Marvell ARM Processor Pipeline Description > +;; Copyright (C) 2011-2014 Free Software Foundation, Inc. > +;; > +;; Contributed by Marvell. > + > +;; This file is part of GCC. > +;; > +;; GCC is free software; you can redistribute it and/or modify it > +;; under the terms of the GNU General Public License as published > +;; by the Free Software Foundation; either version 3, or (at your > +;; option) any later version. > +;; > +;; GCC is distributed in the hope that it will be useful, but WITHOUT > +;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY > +;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public > +;; License for more details. > +;; > +;; You should have received a copy of the GNU General Public License > +;; along with GCC; see the file COPYING3. If not see > +;; <http://www.gnu.org/licenses/>. > + > +(define_attr "whitney_type" > + "wTP1,wTP2,wTP3,wTP4,wTP5,wTP6,wTP7,wTP8,wTP9,wTP10,wTP11,wTP12,wTP13,\ > + > wTP14,wTP15,wTP16,wTP17,wTP18,wTP19,wTP20,wTP21,wTP22,wTP23,wTP24,wTP25,\ > + > wTP26,wTP27,wTP28,wTP29,wTP30,wTP31,wTP32,wTP33,wTP34,wTP35,wTP36,wTP37,\ > + > wTP38,wTP39,wTP40,wTP41,wTP42,wTP43,wTP44,wTP45,wTP46,wTP47,wTP48,wTP49,\ > + wTP50,wTP51,wTP52,wTP53,wTP54,wTP55,wTP56,wTP57,wTP58,wTP59,\ > + unknown" > + (cond [ > + (eq_attr "type" "alu_imm,alu_sreg,alus_imm,alus_sreg,adc_reg,\ > + adc_imm,bfm,branch,call,clz,extend,logic_imm,\ > + > logic_reg,logics_imm,logics_reg,logics_shift_reg,\ > + mov_imm,mov_reg,mvn_imm,mvn_reg,shift_imm,\ > + shift_reg,rev") > + (const_string "wTP1") > + (eq_attr "type" "alu_shift_imm,alu_shift_reg") > + (if_then_else (match_test > + "marvell_whitney_non_shift_with_shift_operand > (insn)") > + (const_string "wTP2") > + (const_string "wTP1")) > + (eq_attr "type" "alus_shift_imm,alus_shift_reg,mov_shift_reg,\ > + > mov_shift,mvn_shift_reg,mvn_shift,logic_shift_imm,\ > + logic_shift_reg,multiple") > + (const_string "wTP2") > + (eq_attr "type" "mla,mlas,mul,muls,smlal,smlalxy,smlaxy,smull,\ > + smulxy,umlal,umull") > + (const_string "wTP3") > + (eq_attr "type" "sdiv,udiv") > + (const_string "wTP4") > + (eq_attr "type" "load1,load2,f_loads,f_loadd,load_byte") > + (const_string "wTP5") > + (eq_attr "type" "neon_load2_one_lane,neon_load2_one_lane_q,\ > + neon_load2_all_lanes,neon_load2_all_lanes_q,\ > + neon_load2_2reg_q") > + (const_string "wTP7") > + (eq_attr "type" "neon_load3_one_lane,neon_load3_one_lane_q,\ > + neon_load3_3reg,neon_load3_3reg_q,\ > + neon_load3_all_lanes,neon_load3_all_lanes_q") > + (const_string "wTP8") > + (eq_attr "type" "neon_load4_one_lane,neon_load4_one_lane_q,\ > + neon_load4_4reg,neon_load4_4reg_q,\ > + neon_load4_all_lanes,neon_load4_all_lanes_q") > + (const_string "wTP9") > + (eq_attr "type" "load3,load4,neon_load1_3reg,neon_load1_3reg_q,\ > + > neon_load1_4reg,neon_load1_4reg_q,neon_load1_4reg") > + (const_string "wTP10") > + (eq_attr "type" "load2,neon_load1_1reg,neon_load1_1reg_q,\ > + neon_load1_2reg,neon_load1_2reg_q,") > + (const_string "wTP11") > + (eq_attr "type" "neon_load1_all_lanes,neon_load1_all_lanes_q,\ > + neon_load1_one_lane,neon_load1_one_lane_q,") > + (const_string "wTP6") > + (eq_attr "type" "f_stored,f_stores,store1,store2") > + (const_string "wTP12") > + (eq_attr "type" "f_stored,neon_store1_3reg,neon_store1_3reg_q,\ > + neon_store1_4reg,neon_store1_4reg_q,\ > + neon_store2_4reg,neon_store2_4reg_q,\ > + neon_store3_3reg,neon_store3_3reg_q,\ > + neon_store3_one_lane,neon_store3_one_lane_q,\ > + neon_store4_4reg,neon_store4_4reg_q,\ > + neon_store4_one_lane,neon_store4_one_lane_q,\ > + store3,store4") > + (const_string "wTP13") > + (eq_attr "type" "neon_store1_1reg,neon_store1_1reg_q,\ > + neon_store1_2reg,neon_store1_2reg_q,\ > + neon_store1_one_lane,neon_store1_one_lane_q,\ > + neon_store2_2reg,neon_store2_2reg_q,\ > + neon_store2_one_lane,neon_store2_one_lane_q") > + (const_string "wTP14") > + (eq_attr "type" "fmuld,fmuls,neon_fp_mul_s,neon_fp_mul_s_scalar") > + (const_string "wTP15") > + (eq_attr "type" "neon_fp_mul_s_q,neon_fp_mul_s_scalar_q") > + (const_string "wTP16") > + (eq_attr "type" "ffmad,ffmas,neon_fp_mla_s,neon_fp_round_s,\ > + neon_fp_round_d") > + (const_string "wTP17") > + (eq_attr "type" "neon_fp_mla_s_q,neon_fp_round_s_q,\ > + neon_fp_round_d_q") > + (const_string "wTP18") > + (eq_attr "type" "fmacd,fmacs,neon_fp_mla_s,neon_fp_mla_s_scalar,\ > + neon_fp_recps_s,neon_fp_rsqrts_s") > + (const_string "wTP19") > + (eq_attr "type" "neon_fp_mla_s_q,neon_fp_mla_s_scalar_q,\ > + neon_fp_recps_s_q,neon_fp_rsqrts_s_q") > + (const_string "wTP20") > + (eq_attr "type" "fconsts,fconstd,ffariths,ffarithd,fmov,\ > + neon_fp_abs_s,neon_fp_neg_s") > + (const_string "wTP21") > + (eq_attr "type" "neon_fp_abs_s_q,neon_fp_neg_s_q") > + (const_string "wTP22") > + (eq_attr "type" "fcmpd,fcmps,neon_fp_minmax_s,neon_fp_compare_s,\ > + neon_fp_reduc_minmax_s,neon_fp_reduc_minmax_d") > + (const_string "wTP23") > + (eq_attr "type" "neon_fp_minmax_s_q,neon_fp_compare_s_q,\ > + > neon_fp_reduc_minmax_s_q,neon_fp_reduc_minmax_d_q") > + (const_string "wTP24") > + (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f,neon_fp_to_int_s,\ > + > neon_fp_to_int_d,neon_int_to_fp_s,neon_int_to_fp_d") > + (const_string "wTP25") > + (eq_attr "type" "neon_fp_to_int_s_q,neon_fp_to_int_d_q,\ > + neon_int_to_fp_s_q,neon_int_to_fp_d_q") > + (const_string "wTP26") > + (eq_attr "type" "faddd,fadds,neon_fp_abd_s,neon_fp_addsub_s,\ > + neon_fp_reduc_add_s") > + (const_string "wTP27") > + (eq_attr "type" "neon_fp_abd_s_q,neon_fp_addsub_s_q,\ > + neon_fp_reduc_add_s_q") > + (const_string "wTP28") > + (eq_attr "type" "fdivs") > + (const_string "wTP29") > + (eq_attr "type" "fsqrts") > + (const_string "wTP30") > + (eq_attr "type" "fdivd") > + (const_string "wTP31") > + (eq_attr "type" "fsqrtd") > + (const_string "wTP32") > + (eq_attr "type" "neon_reduc_add_acc") > + (if_then_else (match_test > + "marvell_whitney_vector_element_size_is_byte > (insn)") > + (const_string "wTP33") > + (const_string "wTP35")) > + (eq_attr "type" "neon_reduc_add_acc_q") > + (if_then_else (match_test > + "marvell_whitney_vector_element_size_is_byte > (insn)") > + (const_string "wTP34") > + (const_string "wTP36")) > + (eq_attr "type" > "neon_add,neon_qadd,neon_qsub,neon_reduc_add_long,\ > + neon_reduc_add,neon_sub,neon_sub_halve") > + (if_then_else (match_test > + "marvell_whitney_vector_element_size_is_byte > (insn)") > + (const_string "wTP37") > + (const_string "wTP39")) > + (eq_attr "type" "neon_add_q,neon_qadd_q,neon_qsub_q,\ > + neon_reduc_add_q,neon_sub_q,neon_sub_halve_q") > + (if_then_else (match_test > + "marvell_whitney_vector_element_size_is_byte > (insn)") > + (const_string "wTP38") > + (const_string "wTP40")) > + (eq_attr "type" "neon_add_halve,neon_add_long,neon_add_widen,\ > + neon_compare,neon_compare_zero,neon_sub_long,\ > + neon_sub_widen,neon_tst") > + (const_string "wTP37") > + (eq_attr "type" "neon_add_halve_q,neon_compare_q,\ > + neon_compare_zero_q,neon_tst_q") > + (const_string "wTP38") > + (eq_attr "type" > "neon_add_halve_narrow_q,neon_sub_halve_narrow_q") > + (const_string "wTP40") > + (eq_attr "type" "neon_permute,neon_tbl1,neon_tbl2,neon_tbl3,\ > + neon_tbl4,neon_zip") > + (const_string "wTP41") > + (eq_attr "type" "neon_permute_q,neon_zip_q") > + (const_string "wTP42") > + (eq_attr "type" "neon_bsl,neon_logic") > + (const_string "wTP43") > + (eq_attr "type" "neon_arith_acc,neon_shift_acc") > + (if_then_else (match_test > + "marvell_whitney_vector_element_size_is_byte > (insn)") > + (const_string "wTP43") > + (const_string "wTP45")) > + (eq_attr "type" "neon_arith_acc_q,neon_shift_acc_q") > + (if_then_else (match_test > + "marvell_whitney_vector_element_size_is_byte > (insn)") > + (const_string "wTP44") > + (const_string "wTP46")) > + (eq_attr "type" "neon_logic_q") > + (const_string "wTP44") > + (eq_attr "type" "neon_cls,neon_cnt,neon_dup,neon_ext,\ > + neon_fp_recpe_s,neon_fp_rsqrte_s,neon_minmax,\ > + neon_move,neon_reduc_minmax,neon_rev") > + (const_string "wTP47") > + (eq_attr "type" "neon_cls_q,neon_cnt_q,neon_dup_q,neon_ext_q,\ > + > neon_fp_recpe_s_q,neon_fp_rsqrte_s_q,neon_minmax_q,\ > + > neon_move_q,neon_move_narrow_q,neon_reduc_minmax_q,\ > + neon_rev_q,neon_sat_shift_imm_narrow_q,\ > + neon_shift_imm_narrow_q") > + (const_string "wTP48") > + (eq_attr "type" "neon_abd_long,neon_abs,neon_neg,neon_qabs,\ > + > neon_qneg,neon_sat_shift_imm,neon_shift_imm_long,\ > + neon_shift_imm,neon_shift_reg") > + (if_then_else (match_test > + "marvell_whitney_vector_element_size_is_byte > (insn)") > + (const_string "wTP47") > + (const_string "wTP49")) > + (eq_attr "type" "neon_abs_q,neon_neg_q,neon_qabs_q,neon_qneg_q,\ > + neon_sat_shift_imm_q,neon_shift_imm_q,\ > + neon_shift_reg_q") > + (if_then_else (match_test > + "marvell_whitney_vector_element_size_is_byte > (insn)") > + (const_string "wTP48") > + (const_string "wTP50")) > + (eq_attr "type" > "neon_mul_b_long,neon_mul_h_long,neon_mul_s_long,\ > + neon_sat_mul_b,neon_sat_mul_h,neon_sat_mul_s") > + (const_string "wTP51") > + (eq_attr "type" > "neon_sat_mul_b_q,neon_sat_mul_h_q,neon_sat_mul_s_q,\ > + neon_mul_h_scalar_long,neon_mul_s_scalar_long,\ > + neon_sat_mul_b_long,neon_sat_mul_h_long,\ > + neon_sat_mul_s_long,neon_sat_mul_h_scalar_long,\ > + > neon_sat_mul_s_scalar_long,neon_sat_mul_h_scalar_q,\ > + neon_sat_mul_s_scalar_q") > + (const_string "wTP52") > + (eq_attr "type" > "neon_mla_b,neon_mla_h,neon_mla_s,neon_mla_h_scalar,\ > + neon_mla_s_scalar") > + (const_string "wTP53") > + (eq_attr "type" "neon_mla_b_q,neon_mla_h_q,neon_mla_s_q,\ > + neon_mla_h_scalar_q,neon_mla_s_scalar_q,\ > + > neon_mla_b_long,neon_mla_h_long,neon_mla_s_long,\ > + neon_mla_h_scalar_long,neon_mla_s_scalar_long,\ > + neon_sat_mla_b_long,neon_sat_mla_h_long,\ > + neon_sat_mla_s_long,neon_sat_mla_h_scalar_long,\ > + neon_sat_mla_s_scalar_long") > + (const_string "wTP54") > + (eq_attr "type" "f_flag,f_mrc,f_mrrc") > + (const_string "wTP57") > + (eq_attr "type" "neon_to_gp,neon_to_gp_q") > + (const_string "wTP55") > + (eq_attr "type" "f_mcr,f_mcrr") > + (const_string "wTP58") > + (eq_attr "type" "neon_from_gp_q") > + (const_string "wTP59") > + (eq_attr "type" "neon_from_gp") > + (const_string "wTP56")] > + (const_string "unknown"))) > + > +(define_attr "tune_marvell_whitney" "yes,no" > + (const (if_then_else (eq_attr "tune" "marvell_whitney") > + (const_string "yes") > + (const_string "no")))) > + > +(define_automaton "whitney_pipe") > + > +(define_cpu_unit "wCU1" "whitney_pipe") > +(define_cpu_unit "wCU2" "whitney_pipe") > +(define_cpu_unit "wCU3" "whitney_pipe") > +(define_cpu_unit "wCU4" "whitney_pipe") > +(define_cpu_unit "wCU5" "whitney_pipe") > +(define_cpu_unit "wCU6" "whitney_pipe") > +(define_cpu_unit "wCU7" "whitney_pipe") > +(define_cpu_unit "wCU8" "whitney_pipe") > +(define_cpu_unit "wCU9" "whitney_pipe") > +(define_cpu_unit "wCU10" "whitney_pipe") > +(define_cpu_unit "wCU11" "whitney_pipe") > +(define_cpu_unit "wCU12" "whitney_pipe") > +(define_cpu_unit "wCU13" "whitney_pipe") > + > +(define_insn_reservation "wIR1" 1 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP1")) > + "wCU1|wCU2|(wCU3+wCU4)" > +) > + > +(define_insn_reservation "wIR2" 2 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP2")) > + "wCU1|wCU2|(wCU3+wCU4)" > +) > + > +(define_insn_reservation "wIR3" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP3")) > + "(wCU1|wCU2|(wCU3+wCU4)), wCU8" > +) > + > +(define_insn_reservation "wIR4" 17 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP4")) > + "(wCU1|wCU2|(wCU3+wCU4)), wCU7*8" > +) > + > +(define_insn_reservation "wIR5" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP5")) > + "(wCU1|wCU2|(wCU3+wCU4)), (wCU5|wCU6)" > +) > + > +(define_insn_reservation "wIR6" 0 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP12")) > + "(wCU1|wCU2|(wCU3+wCU4)), wCU6" > +) > + > +(define_insn_reservation "wIR7" 8 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP6")) > + "wCU1+wCU3+wCU4+wCU2,(wCU5|wCU6)" > +) > + > +(define_insn_reservation "wIR8" 8 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP7")) > + "(wCU1+wCU3+wCU4+wCU2)*2,(wCU5|wCU6)" > +) > + > +(define_insn_reservation "wIR9" 9 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP8")) > + "(wCU1+wCU3+wCU4+wCU2)*3,(wCU5|wCU6)" > +) > + > +(define_insn_reservation "wIR10" 9 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP9")) > + "(wCU1+wCU3+wCU4+wCU2)*4,(wCU5|wCU6)" > +) > + > +(define_insn_reservation "wIR11" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP10")) > + "(wCU1+wCU3+wCU4+wCU2)*2,(wCU5|wCU6)" > +) > + > +(define_insn_reservation "wIR12" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP11")) > + "wCU1+wCU3+wCU4+wCU2,(wCU5|wCU6)" > +) > + > +(define_insn_reservation "wIR13" 0 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP13")) > + "(wCU1+wCU3+wCU4+wCU2)*2,wCU6" > +) > + > +(define_insn_reservation "wIR14" 0 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP14")) > + "wCU1+wCU3+wCU4+wCU2,wCU6" > +) > + > +(define_insn_reservation "wIR15" 6 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP15")) > + "(wCU1|wCU2), wCU9" > +) > + > +(define_insn_reservation "wIR16" 6 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP16")) > + "(wCU1+wCU2), wCU9*2" > +) > + > +(define_insn_reservation "wIR17" 6 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP17")) > + "((wCU1+wCU3)|(wCU2+wCU4)), wCU9" > +) > + > +(define_insn_reservation "wIR18" 6 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP18")) > + "(wCU1+wCU3+wCU2+wCU4), wCU9*2" > +) > + > +(define_insn_reservation "wIR19" 10 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP19")) > + "(wCU1+wCU2), wCU9" > +) > + > +(define_insn_reservation "wIR20" 10 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP20")) > + "(wCU1+wCU2)*2, wCU9" > +) > + > +(define_insn_reservation "wIR21" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP21")) > + "(wCU1|wCU2), wCU11" > +) > + > +(define_insn_reservation "wIR22" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP22")) > + "(wCU1+wCU2), wCU11*2" > +) > + > +(define_insn_reservation "wIR23" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP23")) > + "(wCU1|wCU2), wCU11" > +) > + > +(define_insn_reservation "wIR24" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP24")) > + "(wCU1+wCU2), wCU11*2" > +) > + > +(define_insn_reservation "wIR25" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP25")) > + "(wCU1|wCU2), wCU11" > +) > + > +(define_insn_reservation "wIR26" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP26")) > + "(wCU1+wCU2), wCU11*2" > +) > + > +(define_insn_reservation "wIR27" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP27")) > + "(wCU1|wCU2), wCU10" > +) > + > +(define_insn_reservation "wIR28" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP28")) > + "(wCU1+wCU2), wCU10*2" > +) > + > +(define_insn_reservation "wIR29" 16 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP29")) > + "(wCU1|wCU2), wCU9, wCU12*8" > +) > + > +(define_insn_reservation "wIR30" 16 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP30")) > + "(wCU1|wCU2), wCU9, wCU12*8" > +) > + > +(define_insn_reservation "wIR31" 26 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP31")) > + "(wCU1|wCU2), wCU9, wCU12*8" > +) > + > +(define_insn_reservation "wIR32" 26 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP32")) > + "(wCU1|wCU2), wCU9, wCU12*8" > +) > + > +(define_insn_reservation "wIR33" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP33")) > + "((wCU1+wCU3)|(wCU2+wCU4)), wCU10" > +) > + > +(define_insn_reservation "wIR34" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP34")) > + "(wCU1+wCU3+wCU2+wCU4), (wCU10+wCU11)" > +) > + > +(define_insn_reservation "wIR35" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP35")) > + "((wCU1+wCU3)|(wCU2+wCU4)), wCU10" > +) > + > +(define_insn_reservation "wIR36" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP36")) > + "(wCU1+wCU3+wCU2+wCU4), (wCU10+wCU11)" > +) > + > +(define_insn_reservation "wIR37" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP37")) > + "(wCU1|wCU2), wCU10" > +) > + > +(define_insn_reservation "wIR38" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP38")) > + "(wCU1+wCU2), (wCU10+wCU11)" > +) > + > +(define_insn_reservation "wIR39" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP39")) > + "(wCU1|wCU2), wCU10" > +) > + > +(define_insn_reservation "wIR40" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP40")) > + "(wCU1+wCU2), (wCU10+wCU11)" > +) > + > +(define_insn_reservation "wIR41" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP41")) > + "(wCU1+wCU3+wCU4+wCU2), wCU10*2" > +) > + > +(define_insn_reservation "wIR42" 4 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP42")) > + "(wCU1+wCU3+wCU4+wCU2)*2, wCU10*3" > +) > + > +(define_insn_reservation "wIR43" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP43")) > + "((wCU1+wCU3)|(wCU4+wCU2)), wCU10" > +) > + > +(define_insn_reservation "wIR44" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP44")) > + "(wCU1+wCU3+wCU4+wCU2), (wCU10+wCU11)" > +) > + > +(define_insn_reservation "wIR45" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP45")) > + "((wCU1+wCU3)|(wCU4+wCU2)), wCU10" > +) > + > +(define_insn_reservation "wIR46" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP46")) > + "(wCU1+wCU3+wCU4+wCU2), (wCU10+wCU11)" > +) > + > +(define_insn_reservation "wIR47" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP47")) > + "(wCU1|wCU2), wCU10" > +) > + > +(define_insn_reservation "wIR48" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP48")) > + "(wCU1+wCU2), (wCU10+wCU11)" > +) > + > +(define_insn_reservation "wIR49" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP49")) > + "(wCU1|wCU2), wCU10" > +) > + > +(define_insn_reservation "wIR50" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP50")) > + "(wCU1+wCU2), (wCU10+wCU11)" > +) > + > +(define_insn_reservation "wIR51" 5 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP51")) > + "(wCU1|wCU2), wCU9" > +) > + > +(define_insn_reservation "wIR52" 5 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP52")) > + "(wCU1+wCU2), wCU9*2" > +) > + > +(define_insn_reservation "wIR53" 5 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP53")) > + "((wCU1+wCU3)|(wCU2+wCU4)), wCU9" > +) > + > +(define_insn_reservation "wIR54" 5 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP54")) > + "(wCU1+wCU3+wCU2+wCU4), wCU9*2" > +) > + > +(define_insn_reservation "wIR55" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP55")) > + "(wCU1|wCU2), wCU11" > +) > + > +(define_insn_reservation "wIR56" 2 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP56")) > + "((wCU1+wCU3)|(wCU2+wCU4)), wCU11" > +) > + > +(define_insn_reservation "wIR57" 3 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP57")) > + "(wCU1|wCU2), wCU11" > +) > + > +(define_insn_reservation "wIR58" 2 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP58")) > + "((wCU1+wCU3)|(wCU2+wCU4)), wCU11" > +) > + > +(define_insn_reservation "wIR59" 2 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "wTP59")) > + "(wCU1+wCU3+wCU2+wCU4), wCU11*2" > +) > + > +(define_insn_reservation "wIR60" 0 > + (and (eq_attr "tune_marvell_whitney" "yes") > + (eq_attr "whitney_type" "unknown")) > + "wCU13" > +) > + > +(define_bypass 8 "wIR15" "wIR29, wIR31, wIR30, wIR32") > +(define_bypass 8 "wIR16" "wIR29, wIR31, wIR30, wIR32") > +(define_bypass 8 "wIR17" "wIR29, wIR31, wIR30, wIR32") > +(define_bypass 8 "wIR18" "wIR29, wIR31, wIR30, wIR32") > +(define_bypass 12 "wIR19" "wIR29, wIR31, wIR30, wIR32") > +(define_bypass 12 "wIR20" "wIR29, wIR31, wIR30, wIR32") > +(define_bypass 4 "wIR21" "wIR29, wIR31, wIR30, wIR32") > +(define_bypass 5 "wIR22" "wIR41") > +(define_bypass 6 "wIR22" "wIR42") > +(define_bypass 6 "wIR23" "wIR41, wIR42") > +(define_bypass 6 "wIR24" "wIR41") > +(define_bypass 7 "wIR24" "wIR42") > +(define_bypass 6 "wIR25" "wIR30, wIR32, wIR29, wIR31") > +(define_bypass 7 "wIR26" "wIR41") > +(define_bypass 8 "wIR26" "wIR42") > +(define_bypass 6 "wIR27" "wIR41, wIR42") > +(define_bypass 6 "wIR28" "wIR41, wIR42") > +(define_bypass 18 "wIR29" "wIR29, wIR30, wIR31, wIR32") > +(define_bypass 18 "wIR30" "wIR29, wIR30, wIR31, wIR32") > +(define_bypass 28 "wIR31" "wIR29, wIR30, wIR31, wIR32") > +(define_bypass 28 "wIR32" "wIR29, wIR30, wIR31, wIR32") > +(define_bypass 6 "wIR33" "wIR41, wIR42") > +(define_bypass 6 "wIR34" "wIR41") > +(define_bypass 7 "wIR34" "wIR42") > +(define_bypass 6 "wIR35" "wIR41, wIR42") > +(define_bypass 6 "wIR36" "wIR41") > +(define_bypass 7 "wIR36" "wIR42") > +(define_bypass 6 "wIR37" "wIR41, wIR42") > +(define_bypass 6 "wIR38" "wIR41") > +(define_bypass 7 "wIR38" "wIR42") > +(define_bypass 6 "wIR39" "wIR41, wIR42") > +(define_bypass 6 "wIR40" "wIR41") > +(define_bypass 7 "wIR40" "wIR42") > +(define_bypass 6 "wIR41" "wIR41, wIR42") > +(define_bypass 6 "wIR42" "wIR41") > +(define_bypass 7 "wIR42" "wIR42") > +(define_bypass 6 "wIR43" "wIR41, wIR42") > +(define_bypass 6 "wIR44" "wIR41") > +(define_bypass 7 "wIR44" "wIR42") > +(define_bypass 6 "wIR45" "wIR41, wIR42") > +(define_bypass 6 "wIR46" "wIR41") > +(define_bypass 7 "wIR46" "wIR42") > +(define_bypass 6 "wIR47" "wIR41, wIR42") > +(define_bypass 6 "wIR48" "wIR41") > +(define_bypass 7 "wIR48" "wIR42") > +(define_bypass 6 "wIR49" "wIR41, wIR42") > +(define_bypass 6 "wIR50" "wIR41") > +(define_bypass 7 "wIR50" "wIR42") > +(define_bypass 8 "wIR51" "wIR41, wIR42") > +(define_bypass 8 "wIR52" "wIR41") > +(define_bypass 9 "wIR52" "wIR42") > +(define_bypass 8 "wIR53" "wIR41, wIR42") > +(define_bypass 8 "wIR54" "wIR41") > +(define_bypass 9 "wIR54" "wIR42") > +(define_bypass 2 "wIR56" "wIR41, wIR42") > +(define_bypass 4 "wIR58" "wIR30, wIR32, wIR29, wIR31") > +(define_bypass 5 "wIR58" "wIR41, wIR42") > +(define_bypass 5 "wIR59" "wIR41") > +(define_bypass 6 "wIR59" "wIR42") > diff --git a/gcc/config/arm/t-arm b/gcc/config/arm/t-arm > index d82a123..8af9ad2 100644 > --- a/gcc/config/arm/t-arm > +++ b/gcc/config/arm/t-arm > @@ -61,7 +61,8 @@ MD_INCLUDES= $(srcdir)/config/arm/arm1020e.md \ > $(srcdir)/config/arm/thumb2.md \ > $(srcdir)/config/arm/vec-common.md \ > $(srcdir)/config/arm/vfp11.md \ > - $(srcdir)/config/arm/vfp.md > + $(srcdir)/config/arm/vfp.md \ > + $(srcdir)/config/arm/marvell-whitney.md > > s-config s-conditions s-flags s-codes s-constants s-emit s-recog s-preds \ > s-opinit s-extract s-peep s-attr s-attrtab s-output: $(MD_INCLUDES) > diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi > index 15068da..c2522de 100644 > --- a/gcc/doc/invoke.texi > +++ b/gcc/doc/invoke.texi > @@ -12869,6 +12869,7 @@ Permissible names are: @samp{arm2}, @samp{arm250}, > @samp{cortex-m0.small-multiply}, > @samp{cortex-m0plus.small-multiply}, > @samp{marvell-pj4}, > +@samp{marvell-whitney}, > @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}, > @samp{fa526}, @samp{fa626}, > @samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te}. >
diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def index 423ee9e..b0ffbe1 100644 --- a/gcc/config/arm/arm-cores.def +++ b/gcc/config/arm/arm-cores.def @@ -159,6 +159,7 @@ ARM_CORE("cortex-m7", cortexm7, cortexm7, 7EM, FL_LDSCHED, cortex_m7) ARM_CORE("cortex-m4", cortexm4, cortexm4, 7EM, FL_LDSCHED, v7m) ARM_CORE("cortex-m3", cortexm3, cortexm3, 7M, FL_LDSCHED, v7m) ARM_CORE("marvell-pj4", marvell_pj4, marvell_pj4, 7A, FL_LDSCHED, 9e) +ARM_CORE("marvell-whitney", marvell_whitney, marvell_whitney, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, marvell_whitney) /* V7 big.LITTLE implementations */ ARM_CORE("cortex-a15.cortex-a7", cortexa15cortexa7, cortexa7, 7A, FL_LDSCHED | FL_THUMB_DIV | FL_ARM_DIV, cortex_a15) diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index 20cfa9f..e86db1e 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -231,6 +231,9 @@ extern void arm_order_regs_for_local_alloc (void); extern int arm_max_conditional_execute (); +extern bool marvell_whitney_vector_element_size_is_byte (rtx insn); +extern bool marvell_whitney_non_shift_with_shift_operand (rtx insn); + /* Vectorizer cost model implementation. */ struct cpu_vec_costs { const int scalar_stmt_cost; /* Cost of any scalar operation, excluding diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index 9b1886e..3371ce3 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -298,6 +298,9 @@ EnumValue Enum(processor_type) String(marvell-pj4) Value(marvell_pj4) EnumValue +Enum(processor_type) String(marvell-whitney) Value(marvell_whitney) + +EnumValue Enum(processor_type) String(cortex-a15.cortex-a7) Value(cortexa15cortexa7) EnumValue diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md index d300c51..c73c33c 100644 --- a/gcc/config/arm/arm-tune.md +++ b/gcc/config/arm/arm-tune.md @@ -28,9 +28,10 @@ cortexm1smallmultiply,cortexm0smallmultiply,cortexm0plussmallmultiply, genericv7a,cortexa5,cortexa7, cortexa8,cortexa9,cortexa12, - cortexa15,cortexa17,cortexr4,cortexr4f, - cortexr5,cortexr7,cortexm7, - cortexm4,cortexm3,marvell_pj4, - cortexa15cortexa7,cortexa17cortexa7,cortexa53, - cortexa57,cortexa57cortexa53" + cortexa15,cortexa17,cortexr4, + cortexr4f,cortexr5,cortexr7, + cortexm7,cortexm4,cortexm3, + marvell_pj4,marvell_whitney,cortexa15cortexa7, + cortexa17cortexa7,cortexa53,cortexa57, + cortexa57cortexa53" (const (symbol_ref "((enum attr_tune) arm_tune)"))) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 0ec526b..183da4c 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -1914,6 +1914,25 @@ const struct tune_params arm_cortex_a9_tune = 8 /* Maximum insns to inline memset. */ }; +const struct tune_params arm_marvell_whitney_tune = +{ + arm_9e_rtx_costs, + &cortexa9_extra_costs, + cortex_a9_sched_adjust_cost, + 1, /* Constant limit. */ + 5, /* Max cond insns. */ + ARM_PREFETCH_BENEFICIAL(4,32,32), + false, /* Prefer constant pool. */ + arm_default_branch_cost, + false, /* Prefer LDRD/STRD. */ + {true, true}, /* Prefer non short circuit. */ + &arm_default_vec_cost, /* Vectorizer costs. */ + false, /* Prefer Neon for 64-bits bitops. */ + false, false, /* Prefer 32-bit encodings. */ + false, /* Prefer Neon for stringops. */ + 8 /* Maximum insns to inline memset. */ +}; + const struct tune_params arm_cortex_a12_tune = { arm_9e_rtx_costs, @@ -11608,6 +11627,49 @@ fa726te_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost) return true; } +/* Return true if vector element size is byte. */ +bool +marvell_whitney_vector_element_size_is_byte (rtx insn) +{ + if (GET_CODE (PATTERN (insn)) == SET) + { + if ((GET_MODE (SET_DEST (PATTERN (insn))) == V8QImode) || + (GET_MODE (SET_DEST (PATTERN (insn))) == V16QImode)) + return true; + } + + return false; +} + +/* Return true if INSN has shift operation but is not a shift insn. */ +bool +marvell_whitney_non_shift_with_shift_operand (rtx insn) +{ + rtx pat = PATTERN (insn); + + if (GET_CODE (pat) != SET) + return false; + + /* Is not a shift insn. */ + rtx rvalue = SET_SRC (pat); + RTX_CODE code = GET_CODE (rvalue); + if (code == ASHIFT || code == ASHIFTRT + || code == LSHIFTRT || code == ROTATERT) + return false; + + subrtx_iterator::array_type array; + FOR_EACH_SUBRTX (iter, array, rvalue, ALL) + { + /* Has shift operation. */ + RTX_CODE code = GET_CODE (*iter); + if (code == ASHIFT || code == ASHIFTRT + || code == LSHIFTRT || code == ROTATERT) + return true; + } + + return false; +} + /* Implement TARGET_REGISTER_MOVE_COST. Moves between VFP_REGS and GENERAL_REGS are a single insn, but @@ -27031,6 +27093,7 @@ arm_issue_rate (void) { case cortexa15: case cortexa57: + case marvell_whitney: return 3; case cortexm7: diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 822760b..8f02743 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -386,7 +386,8 @@ arm926ejs,arm1020e,arm1026ejs,arm1136js,\ arm1136jfs,cortexa5,cortexa7,cortexa8,\ cortexa9,cortexa12,cortexa15,cortexa17,\ - cortexa53,cortexm4,cortexm7,marvell_pj4") + cortexa53,cortexm4,cortexm7,marvell_pj4,\ + marvell_whitney") (eq_attr "tune_cortexr4" "yes")) (const_string "no") (const_string "yes")))) @@ -396,7 +397,7 @@ (and (eq_attr "fpu" "vfp") (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa7,\ cortexa8,cortexa9,cortexa53,cortexm4,\ - cortexm7,marvell_pj4") + cortexm7,marvell_pj4,marvell_whitney") (eq_attr "tune_cortexr4" "no")) (const_string "yes") (const_string "no")))) @@ -426,6 +427,7 @@ (include "cortex-m4-fpu.md") (include "vfp11.md") (include "marvell-pj4.md") +(include "marvell-whitney.md") ;;--------------------------------------------------------------------------- diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h index aa93aa4..07fab0f 100644 --- a/gcc/config/arm/bpabi.h +++ b/gcc/config/arm/bpabi.h @@ -68,6 +68,7 @@ |mcpu=cortex-a15.cortex-a7 \ |mcpu=cortex-a17.cortex-a7 \ |mcpu=marvell-pj4 \ + |mcpu=marvell-whitney \ |mcpu=cortex-a53 \ |mcpu=cortex-a57 \ |mcpu=cortex-a57.cortex-a53 \ @@ -96,6 +97,7 @@ |mcpu=cortex-m0.small-multiply \ |mcpu=cortex-m0plus.small-multiply \ |mcpu=marvell-pj4 \ + |mcpu=marvell-whitney \ |mcpu=generic-armv7-a \ |march=armv7ve \ |march=armv7-m|mcpu=cortex-m3 \ diff --git a/gcc/config/arm/marvell-whitney.md b/gcc/config/arm/marvell-whitney.md new file mode 100644 index 0000000..57391a7 --- /dev/null +++ b/gcc/config/arm/marvell-whitney.md @@ -0,0 +1,683 @@ +;; Marvell ARM Processor Pipeline Description +;; Copyright (C) 2011-2014 Free Software Foundation, Inc. +;; +;; Contributed by Marvell. + +;; This file is part of GCC. +;; +;; GCC is free software; you can redistribute it and/or modify it +;; under the terms of the GNU General Public License as published +;; by the Free Software Foundation; either version 3, or (at your +;; option) any later version. +;; +;; GCC is distributed in the hope that it will be useful, but WITHOUT +;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY +;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public +;; License for more details. +;; +;; You should have received a copy of the GNU General Public License +;; along with GCC; see the file COPYING3. If not see +;; <http://www.gnu.org/licenses/>. + +(define_attr "whitney_type" + "wTP1,wTP2,wTP3,wTP4,wTP5,wTP6,wTP7,wTP8,wTP9,wTP10,wTP11,wTP12,wTP13,\ + wTP14,wTP15,wTP16,wTP17,wTP18,wTP19,wTP20,wTP21,wTP22,wTP23,wTP24,wTP25,\ + wTP26,wTP27,wTP28,wTP29,wTP30,wTP31,wTP32,wTP33,wTP34,wTP35,wTP36,wTP37,\ + wTP38,wTP39,wTP40,wTP41,wTP42,wTP43,wTP44,wTP45,wTP46,wTP47,wTP48,wTP49,\ + wTP50,wTP51,wTP52,wTP53,wTP54,wTP55,wTP56,wTP57,wTP58,wTP59,\ + unknown" + (cond [ + (eq_attr "type" "alu_imm,alu_sreg,alus_imm,alus_sreg,adc_reg,\ + adc_imm,bfm,branch,call,clz,extend,logic_imm,\ + logic_reg,logics_imm,logics_reg,logics_shift_reg,\ + mov_imm,mov_reg,mvn_imm,mvn_reg,shift_imm,\ + shift_reg,rev") + (const_string "wTP1") + (eq_attr "type" "alu_shift_imm,alu_shift_reg") + (if_then_else (match_test + "marvell_whitney_non_shift_with_shift_operand (insn)") + (const_string "wTP2") + (const_string "wTP1")) + (eq_attr "type" "alus_shift_imm,alus_shift_reg,mov_shift_reg,\ + mov_shift,mvn_shift_reg,mvn_shift,logic_shift_imm,\ + logic_shift_reg,multiple") + (const_string "wTP2") + (eq_attr "type" "mla,mlas,mul,muls,smlal,smlalxy,smlaxy,smull,\ + smulxy,umlal,umull") + (const_string "wTP3") + (eq_attr "type" "sdiv,udiv") + (const_string "wTP4") + (eq_attr "type" "load1,load2,f_loads,f_loadd,load_byte") + (const_string "wTP5") + (eq_attr "type" "neon_load2_one_lane,neon_load2_one_lane_q,\ + neon_load2_all_lanes,neon_load2_all_lanes_q,\ + neon_load2_2reg_q") + (const_string "wTP7") + (eq_attr "type" "neon_load3_one_lane,neon_load3_one_lane_q,\ + neon_load3_3reg,neon_load3_3reg_q,\ + neon_load3_all_lanes,neon_load3_all_lanes_q") + (const_string "wTP8") + (eq_attr "type" "neon_load4_one_lane,neon_load4_one_lane_q,\ + neon_load4_4reg,neon_load4_4reg_q,\ + neon_load4_all_lanes,neon_load4_all_lanes_q") + (const_string "wTP9") + (eq_attr "type" "load3,load4,neon_load1_3reg,neon_load1_3reg_q,\ + neon_load1_4reg,neon_load1_4reg_q,neon_load1_4reg") + (const_string "wTP10") + (eq_attr "type" "load2,neon_load1_1reg,neon_load1_1reg_q,\ + neon_load1_2reg,neon_load1_2reg_q,") + (const_string "wTP11") + (eq_attr "type" "neon_load1_all_lanes,neon_load1_all_lanes_q,\ + neon_load1_one_lane,neon_load1_one_lane_q,") + (const_string "wTP6") + (eq_attr "type" "f_stored,f_stores,store1,store2") + (const_string "wTP12") + (eq_attr "type" "f_stored,neon_store1_3reg,neon_store1_3reg_q,\ + neon_store1_4reg,neon_store1_4reg_q,\ + neon_store2_4reg,neon_store2_4reg_q,\ + neon_store3_3reg,neon_store3_3reg_q,\ + neon_store3_one_lane,neon_store3_one_lane_q,\ + neon_store4_4reg,neon_store4_4reg_q,\ + neon_store4_one_lane,neon_store4_one_lane_q,\ + store3,store4") + (const_string "wTP13") + (eq_attr "type" "neon_store1_1reg,neon_store1_1reg_q,\ + neon_store1_2reg,neon_store1_2reg_q,\ + neon_store1_one_lane,neon_store1_one_lane_q,\ + neon_store2_2reg,neon_store2_2reg_q,\ + neon_store2_one_lane,neon_store2_one_lane_q") + (const_string "wTP14") + (eq_attr "type" "fmuld,fmuls,neon_fp_mul_s,neon_fp_mul_s_scalar") + (const_string "wTP15") + (eq_attr "type" "neon_fp_mul_s_q,neon_fp_mul_s_scalar_q") + (const_string "wTP16") + (eq_attr "type" "ffmad,ffmas,neon_fp_mla_s,neon_fp_round_s,\ + neon_fp_round_d") + (const_string "wTP17") + (eq_attr "type" "neon_fp_mla_s_q,neon_fp_round_s_q,\ + neon_fp_round_d_q") + (const_string "wTP18") + (eq_attr "type" "fmacd,fmacs,neon_fp_mla_s,neon_fp_mla_s_scalar,\ + neon_fp_recps_s,neon_fp_rsqrts_s") + (const_string "wTP19") + (eq_attr "type" "neon_fp_mla_s_q,neon_fp_mla_s_scalar_q,\ + neon_fp_recps_s_q,neon_fp_rsqrts_s_q") + (const_string "wTP20") + (eq_attr "type" "fconsts,fconstd,ffariths,ffarithd,fmov,\ + neon_fp_abs_s,neon_fp_neg_s") + (const_string "wTP21") + (eq_attr "type" "neon_fp_abs_s_q,neon_fp_neg_s_q") + (const_string "wTP22") + (eq_attr "type" "fcmpd,fcmps,neon_fp_minmax_s,neon_fp_compare_s,\ + neon_fp_reduc_minmax_s,neon_fp_reduc_minmax_d") + (const_string "wTP23") + (eq_attr "type" "neon_fp_minmax_s_q,neon_fp_compare_s_q,\ + neon_fp_reduc_minmax_s_q,neon_fp_reduc_minmax_d_q") + (const_string "wTP24") + (eq_attr "type" "f_cvt,f_cvtf2i,f_cvti2f,neon_fp_to_int_s,\ + neon_fp_to_int_d,neon_int_to_fp_s,neon_int_to_fp_d") + (const_string "wTP25") + (eq_attr "type" "neon_fp_to_int_s_q,neon_fp_to_int_d_q,\ + neon_int_to_fp_s_q,neon_int_to_fp_d_q") + (const_string "wTP26") + (eq_attr "type" "faddd,fadds,neon_fp_abd_s,neon_fp_addsub_s,\ + neon_fp_reduc_add_s") + (const_string "wTP27") + (eq_attr "type" "neon_fp_abd_s_q,neon_fp_addsub_s_q,\ + neon_fp_reduc_add_s_q") + (const_string "wTP28") + (eq_attr "type" "fdivs") + (const_string "wTP29") + (eq_attr "type" "fsqrts") + (const_string "wTP30") + (eq_attr "type" "fdivd") + (const_string "wTP31") + (eq_attr "type" "fsqrtd") + (const_string "wTP32") + (eq_attr "type" "neon_reduc_add_acc") + (if_then_else (match_test + "marvell_whitney_vector_element_size_is_byte (insn)") + (const_string "wTP33") + (const_string "wTP35")) + (eq_attr "type" "neon_reduc_add_acc_q") + (if_then_else (match_test + "marvell_whitney_vector_element_size_is_byte (insn)") + (const_string "wTP34") + (const_string "wTP36")) + (eq_attr "type" "neon_add,neon_qadd,neon_qsub,neon_reduc_add_long,\ + neon_reduc_add,neon_sub,neon_sub_halve") + (if_then_else (match_test + "marvell_whitney_vector_element_size_is_byte (insn)") + (const_string "wTP37") + (const_string "wTP39")) + (eq_attr "type" "neon_add_q,neon_qadd_q,neon_qsub_q,\ + neon_reduc_add_q,neon_sub_q,neon_sub_halve_q") + (if_then_else (match_test + "marvell_whitney_vector_element_size_is_byte (insn)") + (const_string "wTP38") + (const_string "wTP40")) + (eq_attr "type" "neon_add_halve,neon_add_long,neon_add_widen,\ + neon_compare,neon_compare_zero,neon_sub_long,\ + neon_sub_widen,neon_tst") + (const_string "wTP37") + (eq_attr "type" "neon_add_halve_q,neon_compare_q,\ + neon_compare_zero_q,neon_tst_q") + (const_string "wTP38") + (eq_attr "type" "neon_add_halve_narrow_q,neon_sub_halve_narrow_q") + (const_string "wTP40") + (eq_attr "type" "neon_permute,neon_tbl1,neon_tbl2,neon_tbl3,\ + neon_tbl4,neon_zip") + (const_string "wTP41") + (eq_attr "type" "neon_permute_q,neon_zip_q") + (const_string "wTP42") + (eq_attr "type" "neon_bsl,neon_logic") + (const_string "wTP43") + (eq_attr "type" "neon_arith_acc,neon_shift_acc") + (if_then_else (match_test + "marvell_whitney_vector_element_size_is_byte (insn)") + (const_string "wTP43") + (const_string "wTP45")) + (eq_attr "type" "neon_arith_acc_q,neon_shift_acc_q") + (if_then_else (match_test + "marvell_whitney_vector_element_size_is_byte (insn)") + (const_string "wTP44") + (const_string "wTP46")) + (eq_attr "type" "neon_logic_q") + (const_string "wTP44") + (eq_attr "type" "neon_cls,neon_cnt,neon_dup,neon_ext,\ + neon_fp_recpe_s,neon_fp_rsqrte_s,neon_minmax,\ + neon_move,neon_reduc_minmax,neon_rev") + (const_string "wTP47") + (eq_attr "type" "neon_cls_q,neon_cnt_q,neon_dup_q,neon_ext_q,\ + neon_fp_recpe_s_q,neon_fp_rsqrte_s_q,neon_minmax_q,\ + neon_move_q,neon_move_narrow_q,neon_reduc_minmax_q,\ + neon_rev_q,neon_sat_shift_imm_narrow_q,\ + neon_shift_imm_narrow_q") + (const_string "wTP48") + (eq_attr "type" "neon_abd_long,neon_abs,neon_neg,neon_qabs,\ + neon_qneg,neon_sat_shift_imm,neon_shift_imm_long,\ + neon_shift_imm,neon_shift_reg") + (if_then_else (match_test + "marvell_whitney_vector_element_size_is_byte (insn)") + (const_string "wTP47") + (const_string "wTP49")) + (eq_attr "type" "neon_abs_q,neon_neg_q,neon_qabs_q,neon_qneg_q,\ + neon_sat_shift_imm_q,neon_shift_imm_q,\ + neon_shift_reg_q") + (if_then_else (match_test + "marvell_whitney_vector_element_size_is_byte (insn)") + (const_string "wTP48") + (const_string "wTP50")) + (eq_attr "type" "neon_mul_b_long,neon_mul_h_long,neon_mul_s_long,\ + neon_sat_mul_b,neon_sat_mul_h,neon_sat_mul_s") + (const_string "wTP51") + (eq_attr "type" "neon_sat_mul_b_q,neon_sat_mul_h_q,neon_sat_mul_s_q,\ + neon_mul_h_scalar_long,neon_mul_s_scalar_long,\ + neon_sat_mul_b_long,neon_sat_mul_h_long,\ + neon_sat_mul_s_long,neon_sat_mul_h_scalar_long,\ + neon_sat_mul_s_scalar_long,neon_sat_mul_h_scalar_q,\ + neon_sat_mul_s_scalar_q") + (const_string "wTP52") + (eq_attr "type" "neon_mla_b,neon_mla_h,neon_mla_s,neon_mla_h_scalar,\ + neon_mla_s_scalar") + (const_string "wTP53") + (eq_attr "type" "neon_mla_b_q,neon_mla_h_q,neon_mla_s_q,\ + neon_mla_h_scalar_q,neon_mla_s_scalar_q,\ + neon_mla_b_long,neon_mla_h_long,neon_mla_s_long,\ + neon_mla_h_scalar_long,neon_mla_s_scalar_long,\ + neon_sat_mla_b_long,neon_sat_mla_h_long,\ + neon_sat_mla_s_long,neon_sat_mla_h_scalar_long,\ + neon_sat_mla_s_scalar_long") + (const_string "wTP54") + (eq_attr "type" "f_flag,f_mrc,f_mrrc") + (const_string "wTP57") + (eq_attr "type" "neon_to_gp,neon_to_gp_q") + (const_string "wTP55") + (eq_attr "type" "f_mcr,f_mcrr") + (const_string "wTP58") + (eq_attr "type" "neon_from_gp_q") + (const_string "wTP59") + (eq_attr "type" "neon_from_gp") + (const_string "wTP56")] + (const_string "unknown"))) + +(define_attr "tune_marvell_whitney" "yes,no" + (const (if_then_else (eq_attr "tune" "marvell_whitney") + (const_string "yes") + (const_string "no")))) + +(define_automaton "whitney_pipe") + +(define_cpu_unit "wCU1" "whitney_pipe") +(define_cpu_unit "wCU2" "whitney_pipe") +(define_cpu_unit "wCU3" "whitney_pipe") +(define_cpu_unit "wCU4" "whitney_pipe") +(define_cpu_unit "wCU5" "whitney_pipe") +(define_cpu_unit "wCU6" "whitney_pipe") +(define_cpu_unit "wCU7" "whitney_pipe") +(define_cpu_unit "wCU8" "whitney_pipe") +(define_cpu_unit "wCU9" "whitney_pipe") +(define_cpu_unit "wCU10" "whitney_pipe") +(define_cpu_unit "wCU11" "whitney_pipe") +(define_cpu_unit "wCU12" "whitney_pipe") +(define_cpu_unit "wCU13" "whitney_pipe") + +(define_insn_reservation "wIR1" 1 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP1")) + "wCU1|wCU2|(wCU3+wCU4)" +) + +(define_insn_reservation "wIR2" 2 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP2")) + "wCU1|wCU2|(wCU3+wCU4)" +) + +(define_insn_reservation "wIR3" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP3")) + "(wCU1|wCU2|(wCU3+wCU4)), wCU8" +) + +(define_insn_reservation "wIR4" 17 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP4")) + "(wCU1|wCU2|(wCU3+wCU4)), wCU7*8" +) + +(define_insn_reservation "wIR5" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP5")) + "(wCU1|wCU2|(wCU3+wCU4)), (wCU5|wCU6)" +) + +(define_insn_reservation "wIR6" 0 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP12")) + "(wCU1|wCU2|(wCU3+wCU4)), wCU6" +) + +(define_insn_reservation "wIR7" 8 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP6")) + "wCU1+wCU3+wCU4+wCU2,(wCU5|wCU6)" +) + +(define_insn_reservation "wIR8" 8 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP7")) + "(wCU1+wCU3+wCU4+wCU2)*2,(wCU5|wCU6)" +) + +(define_insn_reservation "wIR9" 9 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP8")) + "(wCU1+wCU3+wCU4+wCU2)*3,(wCU5|wCU6)" +) + +(define_insn_reservation "wIR10" 9 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP9")) + "(wCU1+wCU3+wCU4+wCU2)*4,(wCU5|wCU6)" +) + +(define_insn_reservation "wIR11" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP10")) + "(wCU1+wCU3+wCU4+wCU2)*2,(wCU5|wCU6)" +) + +(define_insn_reservation "wIR12" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP11")) + "wCU1+wCU3+wCU4+wCU2,(wCU5|wCU6)" +) + +(define_insn_reservation "wIR13" 0 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP13")) + "(wCU1+wCU3+wCU4+wCU2)*2,wCU6" +) + +(define_insn_reservation "wIR14" 0 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP14")) + "wCU1+wCU3+wCU4+wCU2,wCU6" +) + +(define_insn_reservation "wIR15" 6 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP15")) + "(wCU1|wCU2), wCU9" +) + +(define_insn_reservation "wIR16" 6 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP16")) + "(wCU1+wCU2), wCU9*2" +) + +(define_insn_reservation "wIR17" 6 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP17")) + "((wCU1+wCU3)|(wCU2+wCU4)), wCU9" +) + +(define_insn_reservation "wIR18" 6 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP18")) + "(wCU1+wCU3+wCU2+wCU4), wCU9*2" +) + +(define_insn_reservation "wIR19" 10 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP19")) + "(wCU1+wCU2), wCU9" +) + +(define_insn_reservation "wIR20" 10 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP20")) + "(wCU1+wCU2)*2, wCU9" +) + +(define_insn_reservation "wIR21" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP21")) + "(wCU1|wCU2), wCU11" +) + +(define_insn_reservation "wIR22" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP22")) + "(wCU1+wCU2), wCU11*2" +) + +(define_insn_reservation "wIR23" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP23")) + "(wCU1|wCU2), wCU11" +) + +(define_insn_reservation "wIR24" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP24")) + "(wCU1+wCU2), wCU11*2" +) + +(define_insn_reservation "wIR25" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP25")) + "(wCU1|wCU2), wCU11" +) + +(define_insn_reservation "wIR26" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP26")) + "(wCU1+wCU2), wCU11*2" +) + +(define_insn_reservation "wIR27" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP27")) + "(wCU1|wCU2), wCU10" +) + +(define_insn_reservation "wIR28" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP28")) + "(wCU1+wCU2), wCU10*2" +) + +(define_insn_reservation "wIR29" 16 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP29")) + "(wCU1|wCU2), wCU9, wCU12*8" +) + +(define_insn_reservation "wIR30" 16 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP30")) + "(wCU1|wCU2), wCU9, wCU12*8" +) + +(define_insn_reservation "wIR31" 26 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP31")) + "(wCU1|wCU2), wCU9, wCU12*8" +) + +(define_insn_reservation "wIR32" 26 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP32")) + "(wCU1|wCU2), wCU9, wCU12*8" +) + +(define_insn_reservation "wIR33" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP33")) + "((wCU1+wCU3)|(wCU2+wCU4)), wCU10" +) + +(define_insn_reservation "wIR34" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP34")) + "(wCU1+wCU3+wCU2+wCU4), (wCU10+wCU11)" +) + +(define_insn_reservation "wIR35" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP35")) + "((wCU1+wCU3)|(wCU2+wCU4)), wCU10" +) + +(define_insn_reservation "wIR36" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP36")) + "(wCU1+wCU3+wCU2+wCU4), (wCU10+wCU11)" +) + +(define_insn_reservation "wIR37" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP37")) + "(wCU1|wCU2), wCU10" +) + +(define_insn_reservation "wIR38" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP38")) + "(wCU1+wCU2), (wCU10+wCU11)" +) + +(define_insn_reservation "wIR39" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP39")) + "(wCU1|wCU2), wCU10" +) + +(define_insn_reservation "wIR40" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP40")) + "(wCU1+wCU2), (wCU10+wCU11)" +) + +(define_insn_reservation "wIR41" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP41")) + "(wCU1+wCU3+wCU4+wCU2), wCU10*2" +) + +(define_insn_reservation "wIR42" 4 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP42")) + "(wCU1+wCU3+wCU4+wCU2)*2, wCU10*3" +) + +(define_insn_reservation "wIR43" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP43")) + "((wCU1+wCU3)|(wCU4+wCU2)), wCU10" +) + +(define_insn_reservation "wIR44" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP44")) + "(wCU1+wCU3+wCU4+wCU2), (wCU10+wCU11)" +) + +(define_insn_reservation "wIR45" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP45")) + "((wCU1+wCU3)|(wCU4+wCU2)), wCU10" +) + +(define_insn_reservation "wIR46" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP46")) + "(wCU1+wCU3+wCU4+wCU2), (wCU10+wCU11)" +) + +(define_insn_reservation "wIR47" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP47")) + "(wCU1|wCU2), wCU10" +) + +(define_insn_reservation "wIR48" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP48")) + "(wCU1+wCU2), (wCU10+wCU11)" +) + +(define_insn_reservation "wIR49" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP49")) + "(wCU1|wCU2), wCU10" +) + +(define_insn_reservation "wIR50" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP50")) + "(wCU1+wCU2), (wCU10+wCU11)" +) + +(define_insn_reservation "wIR51" 5 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP51")) + "(wCU1|wCU2), wCU9" +) + +(define_insn_reservation "wIR52" 5 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP52")) + "(wCU1+wCU2), wCU9*2" +) + +(define_insn_reservation "wIR53" 5 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP53")) + "((wCU1+wCU3)|(wCU2+wCU4)), wCU9" +) + +(define_insn_reservation "wIR54" 5 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP54")) + "(wCU1+wCU3+wCU2+wCU4), wCU9*2" +) + +(define_insn_reservation "wIR55" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP55")) + "(wCU1|wCU2), wCU11" +) + +(define_insn_reservation "wIR56" 2 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP56")) + "((wCU1+wCU3)|(wCU2+wCU4)), wCU11" +) + +(define_insn_reservation "wIR57" 3 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP57")) + "(wCU1|wCU2), wCU11" +) + +(define_insn_reservation "wIR58" 2 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP58")) + "((wCU1+wCU3)|(wCU2+wCU4)), wCU11" +) + +(define_insn_reservation "wIR59" 2 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "wTP59")) + "(wCU1+wCU3+wCU2+wCU4), wCU11*2" +) + +(define_insn_reservation "wIR60" 0 + (and (eq_attr "tune_marvell_whitney" "yes") + (eq_attr "whitney_type" "unknown")) + "wCU13" +) + +(define_bypass 8 "wIR15" "wIR29, wIR31, wIR30, wIR32") +(define_bypass 8 "wIR16" "wIR29, wIR31, wIR30, wIR32") +(define_bypass 8 "wIR17" "wIR29, wIR31, wIR30, wIR32") +(define_bypass 8 "wIR18" "wIR29, wIR31, wIR30, wIR32") +(define_bypass 12 "wIR19" "wIR29, wIR31, wIR30, wIR32") +(define_bypass 12 "wIR20" "wIR29, wIR31, wIR30, wIR32") +(define_bypass 4 "wIR21" "wIR29, wIR31, wIR30, wIR32") +(define_bypass 5 "wIR22" "wIR41") +(define_bypass 6 "wIR22" "wIR42") +(define_bypass 6 "wIR23" "wIR41, wIR42") +(define_bypass 6 "wIR24" "wIR41") +(define_bypass 7 "wIR24" "wIR42") +(define_bypass 6 "wIR25" "wIR30, wIR32, wIR29, wIR31") +(define_bypass 7 "wIR26" "wIR41") +(define_bypass 8 "wIR26" "wIR42") +(define_bypass 6 "wIR27" "wIR41, wIR42") +(define_bypass 6 "wIR28" "wIR41, wIR42") +(define_bypass 18 "wIR29" "wIR29, wIR30, wIR31, wIR32") +(define_bypass 18 "wIR30" "wIR29, wIR30, wIR31, wIR32") +(define_bypass 28 "wIR31" "wIR29, wIR30, wIR31, wIR32") +(define_bypass 28 "wIR32" "wIR29, wIR30, wIR31, wIR32") +(define_bypass 6 "wIR33" "wIR41, wIR42") +(define_bypass 6 "wIR34" "wIR41") +(define_bypass 7 "wIR34" "wIR42") +(define_bypass 6 "wIR35" "wIR41, wIR42") +(define_bypass 6 "wIR36" "wIR41") +(define_bypass 7 "wIR36" "wIR42") +(define_bypass 6 "wIR37" "wIR41, wIR42") +(define_bypass 6 "wIR38" "wIR41") +(define_bypass 7 "wIR38" "wIR42") +(define_bypass 6 "wIR39" "wIR41, wIR42") +(define_bypass 6 "wIR40" "wIR41") +(define_bypass 7 "wIR40" "wIR42") +(define_bypass 6 "wIR41" "wIR41, wIR42") +(define_bypass 6 "wIR42" "wIR41") +(define_bypass 7 "wIR42" "wIR42") +(define_bypass 6 "wIR43" "wIR41, wIR42") +(define_bypass 6 "wIR44" "wIR41") +(define_bypass 7 "wIR44" "wIR42") +(define_bypass 6 "wIR45" "wIR41, wIR42") +(define_bypass 6 "wIR46" "wIR41") +(define_bypass 7 "wIR46" "wIR42") +(define_bypass 6 "wIR47" "wIR41, wIR42") +(define_bypass 6 "wIR48" "wIR41") +(define_bypass 7 "wIR48" "wIR42") +(define_bypass 6 "wIR49" "wIR41, wIR42") +(define_bypass 6 "wIR50" "wIR41") +(define_bypass 7 "wIR50" "wIR42") +(define_bypass 8 "wIR51" "wIR41, wIR42") +(define_bypass 8 "wIR52" "wIR41") +(define_bypass 9 "wIR52" "wIR42") +(define_bypass 8 "wIR53" "wIR41, wIR42") +(define_bypass 8 "wIR54" "wIR41") +(define_bypass 9 "wIR54" "wIR42") +(define_bypass 2 "wIR56" "wIR41, wIR42") +(define_bypass 4 "wIR58" "wIR30, wIR32, wIR29, wIR31") +(define_bypass 5 "wIR58" "wIR41, wIR42") +(define_bypass 5 "wIR59" "wIR41") +(define_bypass 6 "wIR59" "wIR42") diff --git a/gcc/config/arm/t-arm b/gcc/config/arm/t-arm index d82a123..8af9ad2 100644 --- a/gcc/config/arm/t-arm +++ b/gcc/config/arm/t-arm @@ -61,7 +61,8 @@ MD_INCLUDES= $(srcdir)/config/arm/arm1020e.md \ $(srcdir)/config/arm/thumb2.md \ $(srcdir)/config/arm/vec-common.md \ $(srcdir)/config/arm/vfp11.md \ - $(srcdir)/config/arm/vfp.md + $(srcdir)/config/arm/vfp.md \ + $(srcdir)/config/arm/marvell-whitney.md s-config s-conditions s-flags s-codes s-constants s-emit s-recog s-preds \ s-opinit s-extract s-peep s-attr s-attrtab s-output: $(MD_INCLUDES) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 15068da..c2522de 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -12869,6 +12869,7 @@ Permissible names are: @samp{arm2}, @samp{arm250}, @samp{cortex-m0.small-multiply}, @samp{cortex-m0plus.small-multiply}, @samp{marvell-pj4}, +@samp{marvell-whitney}, @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}, @samp{fa526}, @samp{fa626}, @samp{fa606te}, @samp{fa626te}, @samp{fmp626}, @samp{fa726te}.
Hi, This patch contains Marvell Whitney core's pipeline description. Test on arm-linux-gnueabi and no new regression are found. Is it OK for trunk? Regards, Xingxing 2014-12-18 Xingxing Pan <xxingpan@marvell.com> * config/arm/arm-cores.def: Add new core marvell-whitney. * config/arm/arm-protos.h: (marvell_whitney_vector_element_size_is_byte): Declare. (marvell_whitney_non_shift_with_shift_operand): Ditto. * config/arm/arm-tables.opt: Regenerated. * config/arm/arm-tune.md: Regenerated. * config/arm/arm.c (arm_marvell_whitney_tune): New structure. (arm_issue_rate): Add marvell_whitney. (marvell_whitney_vector_element_size_is_byte): New function. (marvell_whitney_non_shift_with_shift_operand): Ditto. * config/arm/arm.md: Include marvell-whitney.md. (generic_sched): Add marvell_whitney. (generic_vfp): Ditto. * config/arm/bpabi.h (BE8_LINK_SPEC): Add marvell-whitney. * config/arm/t-arm (MD_INCLUDES): Add marvell-whitney.md. * config/arm/marvell-whitney.md: New file. * doc/invoke.texi: Document marvell-whitney.