From patchwork Tue Jan 5 23:19:28 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: [5/9] sparc64: add macros to deal with softint and timer interrupt Date: Tue, 05 Jan 2010 13:19:28 -0000 From: "Igor V. Kovalenko" X-Patchwork-Id: 42235 Message-Id: <20100105231928.6526.64342.stgit@skyserv> To: qemu-devel@nongnu.org From: Igor V. Kovalenko Signed-off-by: Igor V. Kovalenko --- target-sparc/cpu.h | 6 ++++++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 1fe4d0f..0dba241 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -394,6 +394,8 @@ typedef struct CPUSPARCState { uint64_t fprs; uint64_t tick_cmpr, stick_cmpr; void *tick, *stick; +#define TICK_NPT_MASK 0x8000000000000000ULL +#define TICK_SOFTINT_DISABLE 0x8000000000000000ULL uint64_t gsr; uint32_t gl; // UA2005 /* UA 2005 hyperprivileged registers */ @@ -402,6 +404,10 @@ typedef struct CPUSPARCState { uint32_t softint; #define SOFTINT_TIMER 1 #define SOFTINT_STIMER (1 << 16) +#define SOFTINT_INTRMASK (0xFFFE) +#define SOFTINT_TM (1 << 0) +#define SOFTINT_SM (1 << 16) +#define SOFTINT_REG_MASK (SOFTINT_SM|SOFTINT_INTRMASK|SOFTINT_TM) #endif sparc_def_t *def; } CPUSPARCState;