Message ID | BL2PR03MB4498CBB0D72C92B56300CB9836D0@BL2PR03MB449.namprd03.prod.outlook.com |
---|---|
State | New |
Headers | show |
On 17.12.14 10:18, Amit Tomar wrote: > Ping :) > > -----Original Message----- > From: Tomar Amit-B51888 > Sent: Monday, December 08, 2014 3:03 PM > To: 'qemu-devel@nongnu.org'; 'qemu-ppc@nongnu.org' > Cc: 'agraf@suse.de' > Subject: [PATCH] QEMU:Change the IRQ number for GPIO Controller > > As per RM and following links IRQ 43 is for I2C controller and IRQ 47 is for GPIO controller. > > https://lists.ozlabs.org/pipermail/linuxppc-dev/2011-January/087924.html > http://lxr.free-electrons.com/source/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi?v=3.4 > > > Signed-off-by: Amit Singh Tomar <amit.tomar@freescale.com> Please change the subject line to something that allows people skimming through the patches to know that it modifies ppc e500 code. Otherwise looks good to me. Alex
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 2832fc0..2cd69a9 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -65,7 +65,7 @@ #define MPC8544_UTIL_OFFSET 0xe0000ULL #define MPC8544_SPIN_BASE 0xEF000000ULL #define MPC8XXX_GPIO_OFFSET 0x000FF000ULL -#define MPC8XXX_GPIO_IRQ 43 +#define MPC8XXX_GPIO_IRQ 47 struct boot_info {