diff mbox

[2/4] target-tricore: typo in BOL format

Message ID d3ec7318-761a-45c0-9656-56ee9e5b1654@EXCHANGE-4K.hds.local
State New
Headers show

Commit Message

Alex Zuepke Dec. 12, 2014, 2:10 p.m. UTC 
Signed-off-by: Alex Zuepke <alexander.zuepke@hs-rm.de>
---
 target-tricore/translate.c       |    4 ++--
 target-tricore/tricore-opcodes.h |    2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

Comments

Bastian Koppelmann Dec. 12, 2014, 4:26 p.m. UTC | #1 
On 12/12/2014 02:10 PM, Alex Zuepke wrote:
> Signed-off-by: Alex Zuepke <alexander.zuepke@hs-rm.de>
> ---
>   target-tricore/translate.c       |    4 ++--
>   target-tricore/tricore-opcodes.h |    2 +-
>   2 files changed, 3 insertions(+), 3 deletions(-)
  Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
diff mbox

Patch

diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 65abf45..c132223 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -3203,7 +3203,7 @@  static void decode_bol_opc(CPUTriCoreState *env, DisasContext *ctx, int32_t op1)
         tcg_gen_qemu_ld_tl(cpu_gpr_a[r1], temp, ctx->mem_idx, MO_LEUL);
         tcg_temp_free(temp);
         break;
-    case OPC1_32_BOL_LD_W_LONFOFF:
+    case OPC1_32_BOL_LD_W_LONGOFF:
         temp = tcg_temp_new();
         tcg_gen_addi_tl(temp, cpu_gpr_a[r2], address);
         tcg_gen_qemu_ld_tl(cpu_gpr_d[r1], temp, ctx->mem_idx, MO_LEUL);
@@ -3930,7 +3930,7 @@  static void decode_32Bit_opc(CPUTriCoreState *env, DisasContext *ctx)
         break;
 /* BOL-format */
     case OPC1_32_BOL_LD_A_LONGOFF:
-    case OPC1_32_BOL_LD_W_LONFOFF:
+    case OPC1_32_BOL_LD_W_LONGOFF:
     case OPC1_32_BOL_LEA_LONGOFF:
     case OPC1_32_BOL_ST_W_LONGOFF:
     case OPC1_32_BOL_ST_A_LONGOFF:
diff --git a/target-tricore/tricore-opcodes.h b/target-tricore/tricore-opcodes.h
index 70ac5ff..7aa6aed 100644
--- a/target-tricore/tricore-opcodes.h
+++ b/target-tricore/tricore-opcodes.h
@@ -447,7 +447,7 @@  enum {
     OPCM_32_BO_ADDRMODE_LDMST_BITREVERSE_CIRCULAR    = 0x69,
 /* BOL Format */
     OPC1_32_BOL_LD_A_LONGOFF                         = 0x99,
-    OPC1_32_BOL_LD_W_LONFOFF                         = 0x19,
+    OPC1_32_BOL_LD_W_LONGOFF                         = 0x19,
     OPC1_32_BOL_LEA_LONGOFF                          = 0xd9,
     OPC1_32_BOL_ST_W_LONGOFF                         = 0x59,
     OPC1_32_BOL_ST_A_LONGOFF                         = 0xb5, /* 1.6 only */