diff mbox

[U-Boot,v3,20/27] x86: Add crownbay defconfig and config.h

Message ID 1418389545-11254-21-git-send-email-bmeng.cn@gmail.com
State Superseded
Delegated to: Simon Glass
Headers show

Commit Message

Bin Meng Dec. 12, 2014, 1:05 p.m. UTC 
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
---

Changes in v3: None
Changes in v2: None

 configs/crownbay_defconfig |  6 ++++++
 include/configs/crownbay.h | 52 ++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 58 insertions(+)
 create mode 100644 configs/crownbay_defconfig
 create mode 100644 include/configs/crownbay.h
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Patch

diff --git a/configs/crownbay_defconfig b/configs/crownbay_defconfig
new file mode 100644
index 0000000..ce90553
--- /dev/null
+++ b/configs/crownbay_defconfig
@@ -0,0 +1,6 @@ 
+CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0xfff00000"
+CONFIG_X86=y
+CONFIG_TARGET_CROWNBAY=y
+CONFIG_OF_CONTROL=y
+CONFIG_OF_SEPARATE=y
+CONFIG_DEFAULT_DEVICE_TREE="crownbay"
diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
new file mode 100644
index 0000000..2314e62
--- /dev/null
+++ b/include/configs/crownbay.h
@@ -0,0 +1,52 @@ 
+/*
+ * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/x86-common.h>
+
+#define CONFIG_SYS_MONITOR_LEN		(1 << 20)
+#define CONFIG_SYS_X86_START16		0xfffff800
+#define CONFIG_BOARD_EARLY_INIT_F
+
+#define CONFIG_X86_RESET_VECTOR
+#define CONFIG_NR_DRAM_BANKS		1
+
+#define CONFIG_COREBOOT_SERIAL
+#define CONFIG_SMSC_LPC47M
+
+#define CONFIG_PCI_MEM_BUS		0x40000000
+#define CONFIG_PCI_MEM_PHYS		CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE		0x80000000
+
+#define CONFIG_PCI_PREF_BUS		0xc0000000
+#define CONFIG_PCI_PREF_PHYS		CONFIG_PCI_PREF_BUS
+#define CONFIG_PCI_PREF_SIZE		0x20000000
+
+#define CONFIG_PCI_IO_BUS		0x2000
+#define CONFIG_PCI_IO_PHYS		CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE		0xe000
+
+#define CONFIG_SYS_EARLY_PCI_INIT
+#define CONFIG_PCI_PNP
+
+#define CONFIG_STD_DEVICES_SETTINGS     "stdin=serial\0" \
+					"stdout=serial\0" \
+					"stderr=serial\0"
+
+#define CONFIG_SCSI_DEV_LIST            \
+	{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
+
+/* Video is not supported */
+#undef CONFIG_VIDEO
+#undef CONFIG_CFB_CONSOLE
+
+#endif	/* __CONFIG_H */