From patchwork Thu Dec 11 18:00:36 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 420200 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4A8661400A0 for ; Fri, 12 Dec 2014 05:01:26 +1100 (AEDT) Received: from localhost ([::1]:52883 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xz83I-0001F8-7V for incoming@patchwork.ozlabs.org; Thu, 11 Dec 2014 13:01:24 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45756) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xz82j-0000Qq-7P for qemu-devel@nongnu.org; Thu, 11 Dec 2014 13:00:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Xz82c-0004Rg-Hv for qemu-devel@nongnu.org; Thu, 11 Dec 2014 13:00:49 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:54568) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Xz82b-0004R0-V8 for qemu-devel@nongnu.org; Thu, 11 Dec 2014 13:00:42 -0500 Received: from pm215 by mnementh.archaic.org.uk with local (Exim 4.80) (envelope-from ) id 1Xz82W-0001T9-GN; Thu, 11 Dec 2014 18:00:36 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 11 Dec 2014 18:00:36 +0000 Message-Id: <1418320836-5622-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 1.7.10.4 X-detected-operating-system: by eggs.gnu.org: Error: Malformed IPv6 address (bad octet value). X-Received-From: 2001:8b0:1d0::1 Cc: Paolo Bonzini , Richard Henderson , "Maciej W. Rozycki" , Aurelien Jarno , patches@linaro.org Subject: [Qemu-devel] [PATCH] !fixup softfloat: get default NaN values for SNAN_BIT_IS_ONE right X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org The default NaN values for SNAN_BIT_IS_ONE were actually infinities (all exponent bits set, all mantissa bits clear). Make them really NaNs (all exponent bits set, top bit of mantissa clear, all other mantissa bits set). Signed-off-by: Peter Maydell --- This fixes the error pointed out by Maciej. I'll squash this patch into the other softfloat-relicensing patch; it didn't seem worth sending out the whole series again for this since I anticipate further review. In the meantime, here's the correction. fpu/softfloat-specialize.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h index b65505f..5b4dbcd 100644 --- a/fpu/softfloat-specialize.h +++ b/fpu/softfloat-specialize.h @@ -116,7 +116,7 @@ const float32 float32_default_nan = const_float32(0x7FFFFFFF); defined(TARGET_XTENSA) const float32 float32_default_nan = const_float32(0x7FC00000); #elif SNAN_BIT_IS_ONE -const float32 float32_default_nan = const_float32(0xFF800000); +const float32 float32_default_nan = const_float32(0x7FBFFFFF); #else const float32 float32_default_nan = const_float32(0xFFC00000); #endif @@ -129,7 +129,7 @@ const float64 float64_default_nan = const_float64(LIT64( 0x7FFFFFFFFFFFFFFF )); #elif defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA) const float64 float64_default_nan = const_float64(LIT64( 0x7FF8000000000000 )); #elif SNAN_BIT_IS_ONE -const float64 float64_default_nan = const_float64(LIT64(0xFFF0000000000000)); +const float64 float64_default_nan = const_float64(LIT64(0x7FF7FFFFFFFFFFFF)); #else const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 )); #endif @@ -138,8 +138,8 @@ const float64 float64_default_nan = const_float64(LIT64( 0xFFF8000000000000 )); | The pattern for a default generated extended double-precision NaN. *----------------------------------------------------------------------------*/ #if SNAN_BIT_IS_ONE -#define floatx80_default_nan_high 0xFFFF -#define floatx80_default_nan_low LIT64(0x8000000000000000) +#define floatx80_default_nan_high 0x7FFF +#define floatx80_default_nan_low LIT64(0xBFFFFFFFFFFFFFFF) #else #define floatx80_default_nan_high 0xFFFF #define floatx80_default_nan_low LIT64( 0xC000000000000000 ) @@ -153,8 +153,8 @@ const floatx80 floatx80_default_nan | `low' values hold the most- and least-significant bits, respectively. *----------------------------------------------------------------------------*/ #if SNAN_BIT_IS_ONE -#define float128_default_nan_high LIT64(0xFFFF000000000000) -#define float128_default_nan_low LIT64(0x0000000000000000) +#define float128_default_nan_high LIT64(0x7FFF7FFFFFFFFFFF) +#define float128_default_nan_low LIT64(0xFFFFFFFFFFFFFFFF) #else #define float128_default_nan_high LIT64( 0xFFFF800000000000 ) #define float128_default_nan_low LIT64( 0x0000000000000000 )