diff mbox

[U-Boot] arm: socfpga: board: Repair Micrel PHY tuning

Message ID 1418317591-6279-1-git-send-email-marex@denx.de
State Accepted
Delegated to: Marek Vasut
Headers show

Commit Message

Marek Vasut Dec. 11, 2014, 5:06 p.m. UTC 
From: Pavel Machek <pavel@denx.de>

Add proper error checking into the PHY tuning patch. Make the PHY tunning only
happen in case the KSZ9021 PHY is enabled in config. Call the config callback
after the tuning finished.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Pavel Machek <pavel@denx.de>
---
 board/altera/socfpga/socfpga_cyclone5.c | 34 +++++++++++++++++++++++++++------
 1 file changed, 28 insertions(+), 6 deletions(-)

Comments

Marek Vasut Dec. 16, 2014, 2:33 p.m. UTC | #1 
On Thursday, December 11, 2014 at 06:06:31 PM, Marek Vasut wrote:
> From: Pavel Machek <pavel@denx.de>
> 
> Add proper error checking into the PHY tuning patch. Make the PHY tunning
> only happen in case the KSZ9021 PHY is enabled in config. Call the config
> callback after the tuning finished.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@opensource.altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Tom Rini <trini@ti.com>
> Cc: Pavel Machek <pavel@denx.de>

Applied, thanks.

Best regards,
Marek Vasut
diff mbox

Patch

diff --git a/board/altera/socfpga/socfpga_cyclone5.c b/board/altera/socfpga/socfpga_cyclone5.c
index 772a58e..459d82f 100644
--- a/board/altera/socfpga/socfpga_cyclone5.c
+++ b/board/altera/socfpga/socfpga_cyclone5.c
@@ -46,19 +46,41 @@  int board_init(void)
 	return 0;
 }
 
+/*
+ * PHY configuration
+ */
+#ifdef CONFIG_PHY_MICREL_KSZ9021
 int board_phy_config(struct phy_device *phydev)
 {
+	int ret;
 	/*
 	 * These skew settings for the KSZ9021 ethernet phy is required for ethernet
 	 * to work reliably on most flavors of cyclone5 boards.
 	 */
-	ksz9021_phy_extended_write(phydev, MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
-				   0x0);
-	ksz9021_phy_extended_write(phydev, MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
-				   0x0);
-	ksz9021_phy_extended_write(phydev, MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
-				   0xf0f0);
+	ret = ksz9021_phy_extended_write(phydev,
+					 MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW,
+					 0x0);
+	if (ret)
+		return ret;
+
+	ret = ksz9021_phy_extended_write(phydev,
+					 MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW,
+					 0x0);
+	if (ret)
+		return ret;
+
+	ret = ksz9021_phy_extended_write(phydev,
+					 MII_KSZ9021_EXT_RGMII_CLOCK_SKEW,
+					 0xf0f0);
+	if (ret)
+		return ret;
+
+	if (phydev->drv->config)
+		return phydev->drv->config(phydev);
+
+	return 0;
 }
+#endif
 
 #ifdef CONFIG_USB_GADGET
 struct s3c_plat_otg_data socfpga_otg_data = {