| Message ID | 1418291722-25448-3-git-send-email-lyz@rock-chips.com |
|---|---|
| State | Superseded, archived |
| Headers | show |
Yunzhi, On Thu, Dec 11, 2014 at 1:55 AM, Yunzhi Li <lyz@rock-chips.com> wrote: > This patch adds a binding that describes the Rockchip usb PHYs > found on Rockchip SoCs usb interface. Technically the bindings patch is supposed to come before the driver. So this should be patch #1 and the driver patch #2. > +Required properties: > + - compatible: rockchip,rk3288-usb-phy > + - rockchip,grf : phandle to the syscon managing the "general > + register files" > + - #phy-cells: should be 1 > + - #address-cells: should be 1 > + - #size-cells: should be 0 > + > +Sub-nodes: > +Each PHY should be represented as a sub-node. > + > +Sub-nodes > +required properties: > +- reg: the PHY number > + "0" - PHY connect to OTG controller > + "1" - PHY connect to HOST0 controller > + "2" - PHY connect to HOST1 controller You don't have any sub nodes and are using the phy-cells. Seems like you should get rid of this? ...or I guess switch to using sub nodes and set "phy-cells" to 0? > + > +Optional Properties: > +- clocks : phandle + clock specifier for the phy clocks As per earlier, you should get rid of clocks. If you really want a clock here and it's optional: * Back in the driver it shouldn't be a "warn". You don't warn when optional things are missing. * You really should specify a clock name. Right now this will pick the first clock, which makes it hard to later add clocks. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi, On Thu, Dec 11, 2014 at 10:46 AM, Doug Anderson <dianders@chromium.org> wrote: > Yunzhi, > > On Thu, Dec 11, 2014 at 1:55 AM, Yunzhi Li <lyz@rock-chips.com> wrote: >> This patch adds a binding that describes the Rockchip usb PHYs >> found on Rockchip SoCs usb interface. > > Technically the bindings patch is supposed to come before the driver. > So this should be patch #1 and the driver patch #2. > > >> +Required properties: >> + - compatible: rockchip,rk3288-usb-phy >> + - rockchip,grf : phandle to the syscon managing the "general >> + register files" >> + - #phy-cells: should be 1 >> + - #address-cells: should be 1 >> + - #size-cells: should be 0 >> + >> +Sub-nodes: >> +Each PHY should be represented as a sub-node. >> + >> +Sub-nodes >> +required properties: >> +- reg: the PHY number >> + "0" - PHY connect to OTG controller >> + "1" - PHY connect to HOST0 controller >> + "2" - PHY connect to HOST1 controller > > You don't have any sub nodes and are using the phy-cells. Seems like > you should get rid of this? ...or I guess switch to using sub nodes > and set "phy-cells" to 0? Oh. You actually have them in the ".dtsi" patch, but not here in the example. Hrm. I don't know enough about phys in general to say whether they're needed (I will learn if someone else on this thread doesn't just know), but if they are required then they ought to be in the example... -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt new file mode 100644 index 0000000..e9500d9 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt @@ -0,0 +1,32 @@ +ROCKCHIP USB2 PHY + +Required properties: + - compatible: rockchip,rk3288-usb-phy + - rockchip,grf : phandle to the syscon managing the "general + register files" + - #phy-cells: should be 1 + - #address-cells: should be 1 + - #size-cells: should be 0 + +Sub-nodes: +Each PHY should be represented as a sub-node. + +Sub-nodes +required properties: +- reg: the PHY number + "0" - PHY connect to OTG controller + "1" - PHY connect to HOST0 controller + "2" - PHY connect to HOST1 controller + +Optional Properties: +- clocks : phandle + clock specifier for the phy clocks + +Example: + +usbphy: phy { + compatible = "rockchip,rk3288-usb-phy"; + rockchip,grf = <&grf>; + #phy-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; +};
This patch adds a binding that describes the Rockchip usb PHYs found on Rockchip SoCs usb interface. Signed-off-by: Yunzhi Li <lyz@rock-chips.com> --- Changes in v6: None Changes in v5: - Adjust entry order of example devicetree node in document. Changes in v4: - Updata description for phy device tree subnode. Changes in v3: None .../devicetree/bindings/phy/rockchip-usb-phy.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt