diff mbox

[U-Boot,3/4] spi: sf: Support byte program for sst spi flash

Message ID 1418138980-2302-4-git-send-email-jagannadh.teki@gmail.com
State Superseded
Delegated to: Jagannadha Sutradharudu Teki
Headers show

Commit Message

Jagan Teki Dec. 9, 2014, 3:29 p.m. UTC 
From: Bin Meng <bmeng.cn@gmail.com>

Currently if SST flash advertises SST_WP flag in the params table
the word program command (ADh) with auto address increment will be
used for the flash write op. However some SPI controllers do not
support the word program command (like the Intel ICH 7), the byte
programm command (02h) has to be used.

A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI
controller to use byte program op for SST flash.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
---
 drivers/mtd/spi/sf_internal.h |  2 ++
 drivers/mtd/spi/sf_ops.c      | 31 +++++++++++++++++++++++++++++++
 2 files changed, 33 insertions(+)

Comments

Bin Meng Dec. 10, 2014, 8:10 a.m. UTC | #1 
Hi Jagan,

On Tue, Dec 9, 2014 at 11:29 PM, Jagannadha Sutradharudu Teki
<jagannadh.teki@gmail.com> wrote:
> From: Bin Meng <bmeng.cn@gmail.com>
>
> Currently if SST flash advertises SST_WP flag in the params table
> the word program command (ADh) with auto address increment will be
> used for the flash write op. However some SPI controllers do not
> support the word program command (like the Intel ICH 7), the byte
> programm command (02h) has to be used.
>
> A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI
> controller to use byte program op for SST flash.

This paragraph should be removed from the commit message. The
SPI_OPM_TX_BP was introduced in my original patch, but not in this new
patch. You may need move this commit message to your patch#4 as
SPI_OPM_TX_BP is moved to there.

> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
> Acked-by: Simon Glass <sjg@chromium.org>
> Tested-by: Simon Glass <sjg@chromium.org>
> ---
>  drivers/mtd/spi/sf_internal.h |  2 ++
>  drivers/mtd/spi/sf_ops.c      | 31 +++++++++++++++++++++++++++++++
>  2 files changed, 33 insertions(+)
>
> diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
> index 7218e69..fb53cb0 100644
> --- a/drivers/mtd/spi/sf_internal.h
> +++ b/drivers/mtd/spi/sf_internal.h
> @@ -110,6 +110,8 @@ enum {
>
>  int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
>                 const void *buf);
> +int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
> +               const void *buf);
>  #endif
>
>  /**
> diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
> index 759231f..34bc54e 100644
> --- a/drivers/mtd/spi/sf_ops.c
> +++ b/drivers/mtd/spi/sf_ops.c
> @@ -517,4 +517,35 @@ int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
>         spi_release_bus(flash->spi);
>         return ret;
>  }
> +
> +int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
> +               const void *buf)
> +{
> +       size_t actual;
> +       int ret;
> +
> +       ret = spi_claim_bus(flash->spi);
> +       if (ret) {
> +               debug("SF: Unable to claim SPI bus\n");
> +               return ret;
> +       }
> +
> +       for (actual = 0; actual < len; actual++) {
> +               ret = sst_byte_write(flash, offset, buf + actual);
> +               if (ret) {
> +                       debug("SF: sst byte program failed\n");
> +                       break;
> +               }
> +               offset++;
> +       }
> +
> +       if (!ret)
> +               ret = spi_flash_cmd_write_disable(flash);
> +
> +       debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
> +             ret ? "failure" : "success", len, offset - actual);
> +
> +       spi_release_bus(flash->spi);
> +       return ret;
> +}
>  #endif
> --
> 1.9.1
>

Regards,
Bin
Jagan Teki Dec. 10, 2014, 10:02 a.m. UTC | #2 
On 10 December 2014 at 13:40, Bin Meng <bmeng.cn@gmail.com> wrote:
> Hi Jagan,
>
> On Tue, Dec 9, 2014 at 11:29 PM, Jagannadha Sutradharudu Teki
> <jagannadh.teki@gmail.com> wrote:
>> From: Bin Meng <bmeng.cn@gmail.com>
>>
>> Currently if SST flash advertises SST_WP flag in the params table
>> the word program command (ADh) with auto address increment will be
>> used for the flash write op. However some SPI controllers do not
>> support the word program command (like the Intel ICH 7), the byte
>> programm command (02h) has to be used.
>>
>> A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI
>> controller to use byte program op for SST flash.
>
> This paragraph should be removed from the commit message. The
> SPI_OPM_TX_BP was introduced in my original patch, but not in this new
> patch. You may need move this commit message to your patch#4 as
> SPI_OPM_TX_BP is moved to there.

Ok, Will update the same.

Please send the rest of the patches, will test my whole system again.
Do the same from your side too.

>
>> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>> Acked-by: Simon Glass <sjg@chromium.org>
>> Tested-by: Simon Glass <sjg@chromium.org>
>> ---
>>  drivers/mtd/spi/sf_internal.h |  2 ++
>>  drivers/mtd/spi/sf_ops.c      | 31 +++++++++++++++++++++++++++++++
>>  2 files changed, 33 insertions(+)
>>
>> diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
>> index 7218e69..fb53cb0 100644
>> --- a/drivers/mtd/spi/sf_internal.h
>> +++ b/drivers/mtd/spi/sf_internal.h
>> @@ -110,6 +110,8 @@ enum {
>>
>>  int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
>>                 const void *buf);
>> +int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
>> +               const void *buf);
>>  #endif
>>
>>  /**
>> diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
>> index 759231f..34bc54e 100644
>> --- a/drivers/mtd/spi/sf_ops.c
>> +++ b/drivers/mtd/spi/sf_ops.c
>> @@ -517,4 +517,35 @@ int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
>>         spi_release_bus(flash->spi);
>>         return ret;
>>  }
>> +
>> +int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
>> +               const void *buf)
>> +{
>> +       size_t actual;
>> +       int ret;
>> +
>> +       ret = spi_claim_bus(flash->spi);
>> +       if (ret) {
>> +               debug("SF: Unable to claim SPI bus\n");
>> +               return ret;
>> +       }
>> +
>> +       for (actual = 0; actual < len; actual++) {
>> +               ret = sst_byte_write(flash, offset, buf + actual);
>> +               if (ret) {
>> +                       debug("SF: sst byte program failed\n");
>> +                       break;
>> +               }
>> +               offset++;
>> +       }
>> +
>> +       if (!ret)
>> +               ret = spi_flash_cmd_write_disable(flash);
>> +
>> +       debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
>> +             ret ? "failure" : "success", len, offset - actual);
>> +
>> +       spi_release_bus(flash->spi);
>> +       return ret;
>> +}
>>  #endif
>> --
>> 1.9.1

thanks!
Bin Meng Dec. 10, 2014, 10:18 a.m. UTC | #3 
Hi Jagan,

On Wed, Dec 10, 2014 at 6:02 PM, Jagan Teki <jagannadh.teki@gmail.com> wrote:
> On 10 December 2014 at 13:40, Bin Meng <bmeng.cn@gmail.com> wrote:
>> Hi Jagan,
>>
>> On Tue, Dec 9, 2014 at 11:29 PM, Jagannadha Sutradharudu Teki
>> <jagannadh.teki@gmail.com> wrote:
>>> From: Bin Meng <bmeng.cn@gmail.com>
>>>
>>> Currently if SST flash advertises SST_WP flag in the params table
>>> the word program command (ADh) with auto address increment will be
>>> used for the flash write op. However some SPI controllers do not
>>> support the word program command (like the Intel ICH 7), the byte
>>> programm command (02h) has to be used.
>>>
>>> A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI
>>> controller to use byte program op for SST flash.
>>
>> This paragraph should be removed from the commit message. The
>> SPI_OPM_TX_BP was introduced in my original patch, but not in this new
>> patch. You may need move this commit message to your patch#4 as
>> SPI_OPM_TX_BP is moved to there.
>
> Ok, Will update the same.
>
> Please send the rest of the patches, will test my whole system again.
> Do the same from your side too.

Sure, will rebase on yours and send the rest of my patches soon.

[snip]

Regards,
Bin
diff mbox

Patch

diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 7218e69..fb53cb0 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -110,6 +110,8 @@  enum {
 
 int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 		const void *buf);
+int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
+		const void *buf);
 #endif
 
 /**
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c
index 759231f..34bc54e 100644
--- a/drivers/mtd/spi/sf_ops.c
+++ b/drivers/mtd/spi/sf_ops.c
@@ -517,4 +517,35 @@  int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len,
 	spi_release_bus(flash->spi);
 	return ret;
 }
+
+int sst_write_bp(struct spi_flash *flash, u32 offset, size_t len,
+		const void *buf)
+{
+	size_t actual;
+	int ret;
+
+	ret = spi_claim_bus(flash->spi);
+	if (ret) {
+		debug("SF: Unable to claim SPI bus\n");
+		return ret;
+	}
+
+	for (actual = 0; actual < len; actual++) {
+		ret = sst_byte_write(flash, offset, buf + actual);
+		if (ret) {
+			debug("SF: sst byte program failed\n");
+			break;
+		}
+		offset++;
+	}
+
+	if (!ret)
+		ret = spi_flash_cmd_write_disable(flash);
+
+	debug("SF: sst: program %s %zu bytes @ 0x%zx\n",
+	      ret ? "failure" : "success", len, offset - actual);
+
+	spi_release_bus(flash->spi);
+	return ret;
+}
 #endif