[U-Boot,v2,26/27] x86: Rename coreboot-serial to x86-serial

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>

---

Changes in v2:
- New patch to rename coreboot-serial to x86-serial

 arch/x86/dts/coreboot.dtsi                         |  2 +-
 drivers/serial/Makefile                            |  2 +-
 drivers/serial/{serial_coreboot.c => serial_x86.c} | 12 ++++++------
 include/configs/chromebook_link.h                  |  2 +-
 include/configs/coreboot.h                         |  2 +-
 include/configs/crownbay.h                         |  2 +-
 6 files changed, 11 insertions(+), 11 deletions(-)
 rename drivers/serial/{serial_coreboot.c => serial_x86.c} (67%)

On 9 December 2014 at 07:50, Bin Meng <bmeng.cn@gmail.com> wrote:
> Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
>
> ---
>
> Changes in v2:
> - New patch to rename coreboot-serial to x86-serial
>

Acked-by: Simon Glass <sjg@chromium.org>

>  arch/x86/dts/coreboot.dtsi                         |  2 +-
>  drivers/serial/Makefile                            |  2 +-
>  drivers/serial/{serial_coreboot.c => serial_x86.c} | 12 ++++++------
>  include/configs/chromebook_link.h                  |  2 +-
>  include/configs/coreboot.h                         |  2 +-
>  include/configs/crownbay.h                         |  2 +-
>  6 files changed, 11 insertions(+), 11 deletions(-)
>  rename drivers/serial/{serial_coreboot.c => serial_x86.c} (67%)
>
> diff --git a/arch/x86/dts/coreboot.dtsi b/arch/x86/dts/coreboot.dtsi
> index c8dc4ce..65a93ac 100644
> --- a/arch/x86/dts/coreboot.dtsi
> +++ b/arch/x86/dts/coreboot.dtsi
> @@ -6,7 +6,7 @@
>         };
>
>         serial {
> -               compatible = "coreboot-uart";
> +               compatible = "x86-uart";
>                 reg = <0x3f8 0x10>;
>                 reg-shift = <0>;
>                 io-mapped = <1>;
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index 8c84942..4cc00cd 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -43,7 +43,7 @@ obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
>  obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o
>  obj-$(CONFIG_UNIPHIER_SERIAL) += serial_uniphier.o
>  obj-$(CONFIG_OMAP_SERIAL) += serial_omap.o
> -obj-$(CONFIG_COREBOOT_SERIAL) += serial_coreboot.o
> +obj-$(CONFIG_X86_SERIAL) += serial_x86.o
>
>  ifndef CONFIG_SPL_BUILD
>  obj-$(CONFIG_USB_TTY) += usbtty.o
> diff --git a/drivers/serial/serial_coreboot.c b/drivers/serial/serial_x86.c
> similarity index 67%
> rename from drivers/serial/serial_coreboot.c
> rename to drivers/serial/serial_x86.c
> index 5c6a76c..e81e035 100644
> --- a/drivers/serial/serial_coreboot.c
> +++ b/drivers/serial/serial_x86.c
> @@ -9,12 +9,12 @@
>  #include <ns16550.h>
>  #include <serial.h>
>
> -static const struct udevice_id coreboot_serial_ids[] = {
> -       { .compatible = "coreboot-uart" },
> +static const struct udevice_id x86_serial_ids[] = {
> +       { .compatible = "x86-uart" },
>         { }
>  };
>
> -static int coreboot_serial_ofdata_to_platdata(struct udevice *dev)
> +static int x86_serial_ofdata_to_platdata(struct udevice *dev)
>  {
>         struct ns16550_platdata *plat = dev_get_platdata(dev);
>         int ret;
> @@ -27,10 +27,10 @@ static int coreboot_serial_ofdata_to_platdata(struct udevice *dev)
>         return 0;
>  }
>  U_BOOT_DRIVER(serial_ns16550) = {
> -       .name   = "serial_coreboot",
> +       .name   = "serial_x86",
>         .id     = UCLASS_SERIAL,
> -       .of_match = coreboot_serial_ids,
> -       .ofdata_to_platdata = coreboot_serial_ofdata_to_platdata,
> +       .of_match = x86_serial_ids,
> +       .ofdata_to_platdata = x86_serial_ofdata_to_platdata,
>         .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
>         .priv_auto_alloc_size = sizeof(struct NS16550),
>         .probe = ns16550_serial_probe,
> diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h
> index b311f4c..8930210 100644
> --- a/include/configs/chromebook_link.h
> +++ b/include/configs/chromebook_link.h
> @@ -28,7 +28,7 @@
>  #define CONFIG_X86_MRC_ADDR                    0xfffa0000
>  #define CONFIG_CACHE_MRC_SIZE_KB               512
>
> -#define CONFIG_COREBOOT_SERIAL
> +#define CONFIG_X86_SERIAL
>
>  #define CONFIG_SCSI_DEV_LIST           {PCI_VENDOR_ID_INTEL, \
>                         PCI_DEVICE_ID_INTEL_NM10_AHCI},       \
> diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h
> index 2581380..990a2d1 100644
> --- a/include/configs/coreboot.h
> +++ b/include/configs/coreboot.h
> @@ -49,7 +49,7 @@
>         {PCI_VENDOR_ID_INTEL,           \
>                         PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE}
>
> -#define CONFIG_COREBOOT_SERIAL
> +#define CONFIG_X86_SERIAL
>
>  #define CONFIG_STD_DEVICES_SETTINGS     "stdin=usbkbd,vga,serial\0" \
>                                         "stdout=vga,serial,cbmem\0" \
> diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h
> index b9db6b7..eadb339 100644
> --- a/include/configs/crownbay.h
> +++ b/include/configs/crownbay.h
> @@ -20,7 +20,7 @@
>  #define CONFIG_X86_RESET_VECTOR
>  #define CONFIG_NR_DRAM_BANKS           1
>
> -#define CONFIG_COREBOOT_SERIAL
> +#define CONFIG_X86_SERIAL
>  #define CONFIG_SMSC_LPC47M
>
>  #define CONFIG_PCI_MEM_BUS             0x40000000
> --
> 1.8.2.1
>