QEMU:Change the IRQ number for GPIO Controller
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Message ID BL2PR03MB4495DFD9FAFBFF5E9C6CC5A83640@BL2PR03MB449.namprd03.prod.outlook.com
State New
Headers show

Commit Message

Amit Tomar Dec. 8, 2014, 9:33 a.m. UTC
As per RM and following links IRQ 43 is for I2C controller and IRQ 47 is for GPIO controller.

https://lists.ozlabs.org/pipermail/linuxppc-dev/2011-January/087924.html
http://lxr.free-electrons.com/source/arch/powerpc/boot/dts/fsl/pq3-gpio-0.dtsi?v=3.4


Signed-off-by: Amit Singh Tomar <amit.tomar@freescale.com>
---
 hw/ppc/e500.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Patch
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diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 2832fc0..2cd69a9 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -65,7 +65,7 @@ 
 #define MPC8544_UTIL_OFFSET        0xe0000ULL
 #define MPC8544_SPIN_BASE          0xEF000000ULL
 #define MPC8XXX_GPIO_OFFSET        0x000FF000ULL
-#define MPC8XXX_GPIO_IRQ           43
+#define MPC8XXX_GPIO_IRQ           47

 struct boot_info
 {