diff mbox

[MIPS] P5600 pipeline description fixes

Message ID 72E73D4BBFC6704695754C43662FC58458839BBA@PUMAIL01.pu.imgtec.org
State New
Headers show

Commit Message

Prachi Godbole Dec. 3, 2014, 10:38 a.m. UTC 
Hi,

This patch merges automata p5600_agen_pipe and p5600_alu_pipe into one to enable blocking of the cpu units in either-or reservations.
It also changes the order of the units in such reservations to benefit from multi-issue scenarios.

Changelog:

2014-12-03  Prachi Godbole  <prachi.godbole@imgtec.com>

	* config/mips/p5600.md (define_automaton, define_cpu_unit): Replace
	p5600_agen_pipe and p5600_alu_pipe with p5600_agen_alq_pipe.

	(p5600_int_arith_1, p5600_int_arith_2, p5600_int_arith_4): Change
	reservation order.



Ok?

Prachi

Comments

Matthew Fortune Dec. 3, 2014, 10:48 a.m. UTC | #1 
> Changelog:
> 
> 2014-12-03  Prachi Godbole  <prachi.godbole@imgtec.com>
> 
> 	* config/mips/p5600.md (define_automaton, define_cpu_unit): Replace
> 	p5600_agen_pipe and p5600_alu_pipe with p5600_agen_alq_pipe.
> 
> 	(p5600_int_arith_1, p5600_int_arith_2, p5600_int_arith_4): Change
> 	reservation order.

OK. (No newline required in the middle of the ChangeLog entry.)

Thanks,
Matthew
Prachi Godbole Dec. 3, 2014, 11:23 a.m. UTC | #2 
Committed.

Prachi

-----Original Message-----
From: Matthew Fortune 
Sent: Wednesday, December 3, 2014 4:18 PM
To: Prachi Godbole; gcc-patches@gcc.gnu.org
Subject: RE: [PATCH][MIPS] P5600 pipeline description fixes

> Changelog:
> 
> 2014-12-03  Prachi Godbole  <prachi.godbole@imgtec.com>
> 
> 	* config/mips/p5600.md (define_automaton, define_cpu_unit): Replace
> 	p5600_agen_pipe and p5600_alu_pipe with p5600_agen_alq_pipe.
> 
> 	(p5600_int_arith_1, p5600_int_arith_2, p5600_int_arith_4): Change
> 	reservation order.

OK. (No newline required in the middle of the ChangeLog entry.)

Thanks,
Matthew
diff mbox

Patch

diff --git a/gcc/config/mips/p5600.md b/gcc/config/mips/p5600.md
index d0b1424..c1bde2a 100644
--- a/gcc/config/mips/p5600.md
+++ b/gcc/config/mips/p5600.md
@@ -18,14 +18,14 @@ 
 ;; along with GCC; see the file COPYING3.  If not see
 ;; <http://www.gnu.org/licenses/>.

-(define_automaton "p5600_agen_pipe, p5600_alu_pipe, p5600_fpu_pipe")
+(define_automaton "p5600_agen_alq_pipe, p5600_fpu_pipe")

 ;; The address generation queue (AGQ) has AL2, CTISTD and LDSTA pipes
 (define_cpu_unit "p5600_agq, p5600_al2, p5600_ctistd, p5600_ldsta,
-                 p5600_gpdiv" "p5600_agen_pipe")
+                 p5600_gpdiv" "p5600_agen_alq_pipe")

 ;; The arithmetic-logic-unit queue (ALQ) has ALU pipe
-(define_cpu_unit "p5600_alq, p5600_alu" "p5600_alu_pipe")
+(define_cpu_unit "p5600_alq, p5600_alu" "p5600_agen_alq_pipe")

 ;; The floating-point-unit queue (FPQ) has short and long pipes
 (define_cpu_unit "p5600_fpu_short, p5600_fpu_long" "p5600_fpu_pipe")
@@ -141,13 +141,13 @@ 
 (define_insn_reservation "p5600_int_arith_1" 1
   (and (eq_attr "cpu" "p5600")
        (eq_attr "move_type" "andi,sll0,signext"))
-  "p5600_agq_al2 | p5600_alq_alu")
+  "p5600_alq_alu | p5600_agq_al2")

 ;; addi, addiu, ori, xori, add, addu
 (define_insn_reservation "p5600_int_arith_2" 1
   (and (eq_attr "cpu" "p5600")
        (eq_attr "alu_type" "add,or,xor"))
-  "p5600_agq_al2 | p5600_alq_alu")
+  "p5600_alq_alu | p5600_agq_al2")

 ;; nor, sub
 (define_insn_reservation "p5600_int_arith_3" 1
@@ -159,7 +159,7 @@ 
 (define_insn_reservation "p5600_int_arith_4" 1
   (and (eq_attr "cpu" "p5600")
        (eq_attr "type" "shift,slt,move"))
-  "p5600_agq_al2 | p5600_alq_alu")
+  "p5600_alq_alu | p5600_agq_al2")

 ;; nop
 (define_insn_reservation "p5600_int_nop" 0