From patchwork Sat Dec 19 16:50:19 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 41466 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 93BBDB6F14 for ; Sun, 20 Dec 2009 05:55:46 +1100 (EST) Received: from localhost ([127.0.0.1]:37382 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NM4St-00011q-DS for incoming@patchwork.ozlabs.org; Sat, 19 Dec 2009 13:55:43 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NM4SP-00010N-RR for qemu-devel@nongnu.org; Sat, 19 Dec 2009 13:55:13 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NM4SP-0000zm-1W for qemu-devel@nongnu.org; Sat, 19 Dec 2009 13:55:13 -0500 Received: from [199.232.76.173] (port=56814 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NM4SO-0000zh-Su for qemu-devel@nongnu.org; Sat, 19 Dec 2009 13:55:12 -0500 Received: from are.twiddle.net ([75.149.56.221]:32982) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NM4SN-0005Fx-Or for qemu-devel@nongnu.org; Sat, 19 Dec 2009 13:55:12 -0500 Received: by are.twiddle.net (Postfix, from userid 5000) id D11538DD; Sat, 19 Dec 2009 10:55:09 -0800 (PST) Message-Id: In-Reply-To: References: From: Richard Henderson Date: Sat, 19 Dec 2009 08:50:19 -0800 To: qemu-devel@nongnu.org X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: aurelien@aurel32.net Subject: [Qemu-devel] [PATCH 2/5] tcg-x86_64: Implement setcond. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson Acked-by: Aurelien Jarno --- tcg/x86_64/tcg-target.c | 38 +++++++++++++++++++++++++++++++++----- 1 files changed, 33 insertions(+), 5 deletions(-) diff --git a/tcg/x86_64/tcg-target.c b/tcg/x86_64/tcg-target.c index 2339091..33dc452 100644 --- a/tcg/x86_64/tcg-target.c +++ b/tcg/x86_64/tcg-target.c @@ -491,26 +491,42 @@ static void tcg_out_jxx(TCGContext *s, int opc, int label_index) } } -static void tcg_out_brcond(TCGContext *s, int cond, - TCGArg arg1, TCGArg arg2, int const_arg2, - int label_index, int rexw) +static void tcg_out_cmp(TCGContext *s, TCGArg arg1, TCGArg arg2, + int const_arg2, int rexw) { if (const_arg2) { if (arg2 == 0) { /* test r, r */ tcg_out_modrm(s, 0x85 | rexw, arg1, arg1); } else { - if (rexw) + if (rexw) { tgen_arithi64(s, ARITH_CMP, arg1, arg2); - else + } else { tgen_arithi32(s, ARITH_CMP, arg1, arg2); + } } } else { tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3) | rexw, arg2, arg1); } +} + +static void tcg_out_brcond(TCGContext *s, int cond, + TCGArg arg1, TCGArg arg2, int const_arg2, + int label_index, int rexw) +{ + tcg_out_cmp(s, arg1, arg2, const_arg2, rexw); tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_index); } +static void tcg_out_setcond(TCGContext *s, int cond, TCGArg dest, + TCGArg arg1, TCGArg arg2, int const_arg2, int rexw) +{ + tcg_out_cmp(s, arg1, arg2, const_arg2, rexw); + /* setcc */ + tcg_out_modrm(s, 0x90 | tcg_cond_to_jcc[cond] | P_EXT | P_REXB, 0, dest); + tgen_arithi32(s, ARITH_AND, dest, 0xff); +} + #if defined(CONFIG_SOFTMMU) #include "../../softmmu_defs.h" @@ -1197,6 +1213,15 @@ static inline void tcg_out_op(TCGContext *s, int opc, const TCGArg *args, tcg_out_modrm(s, 0x8b, args[0], args[1]); break; + case INDEX_op_setcond_i32: + tcg_out_setcond(s, args[3], args[0], args[1], args[2], + const_args[2], 0); + break; + case INDEX_op_setcond_i64: + tcg_out_setcond(s, args[3], args[0], args[1], args[2], + const_args[2], P_REXW); + break; + case INDEX_op_qemu_ld8u: tcg_out_qemu_ld(s, args, 0); break; @@ -1376,6 +1401,9 @@ static const TCGTargetOpDef x86_64_op_defs[] = { { INDEX_op_ext16u_i64, { "r", "r"} }, { INDEX_op_ext32u_i64, { "r", "r"} }, + { INDEX_op_setcond_i32, { "r", "r", "ri" } }, + { INDEX_op_setcond_i64, { "r", "r", "re" } }, + { INDEX_op_qemu_ld8u, { "r", "L" } }, { INDEX_op_qemu_ld8s, { "r", "L" } }, { INDEX_op_qemu_ld16u, { "r", "L" } },