From patchwork Thu Dec 17 19:08:50 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 41336 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id B8D74B6EF7 for ; Fri, 18 Dec 2009 06:44:28 +1100 (EST) Received: from localhost ([127.0.0.1]:46520 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NLMGv-0008VA-RU for incoming@patchwork.ozlabs.org; Thu, 17 Dec 2009 14:44:25 -0500 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NLMCx-0006qo-Az for qemu-devel@nongnu.org; Thu, 17 Dec 2009 14:40:19 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NLMCu-0006pI-N9 for qemu-devel@nongnu.org; Thu, 17 Dec 2009 14:40:17 -0500 Received: from [199.232.76.173] (port=50134 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NLMCu-0006ou-5e for qemu-devel@nongnu.org; Thu, 17 Dec 2009 14:40:16 -0500 Received: from are.twiddle.net ([75.149.56.221]:35336) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NLMCt-0004IE-UB for qemu-devel@nongnu.org; Thu, 17 Dec 2009 14:40:16 -0500 Received: by are.twiddle.net (Postfix, from userid 5000) id 8E347A46; Thu, 17 Dec 2009 11:40:12 -0800 (PST) Message-Id: In-Reply-To: References: <761ea48b0912170620l534dcb02m8ea6b59524d76dbe@mail.gmail.com> From: Richard Henderson Date: Thu, 17 Dec 2009 11:08:50 -0800 To: qemu-devel@nongnu.org X-detected-operating-system: by monty-python.gnu.org: GNU/Linux 2.6 (newer, 2) Cc: Laurent Desnogues Subject: [Qemu-devel] [PATCH 6/6] tcg-i386: Implement setcond, movcond, setcond2. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Implement conditional moves in the i386 backend. Signed-off-by: Richard Henderson --- tcg/i386/tcg-target.c | 173 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 173 insertions(+), 0 deletions(-) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index f7b2416..98d667c 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -426,6 +426,165 @@ static void tcg_out_brcond2(TCGContext *s, const TCGArg *args, tcg_out_label(s, label_next, (tcg_target_long)s->code_ptr); } +static void tcg_out_setcond(TCGContext *s, int cond, TCGArg arg0, + TCGArg arg1, TCGArg arg2, int const_arg2) +{ + int use_xor = (arg0 != arg1 && (const_arg2 || arg0 != arg2)); + + if (use_xor) + tcg_out_movi(s, TCG_TYPE_I32, arg0, 0); + tcg_out_cond(s, cond, arg1, arg2, const_arg2); + tcg_out_modrm(s, 0x90 | tcg_cond_to_jcc[cond] | P_EXT, 0, arg0); + if (!use_xor) + tgen_arithi(s, ARITH_AND, arg0, 0xff, 0); +} + +static void tcg_out_setcond2(TCGContext *s, const TCGArg *args, + const int *const_args) +{ + TCGArg new_args[6]; + int label_true, label_over; + + memcpy(new_args, args+1, 5*sizeof(TCGArg)); + + if (args[0] == args[1] || args[0] == args[2] + || (!const_args[3] && args[0] == args[3]) + || (!const_args[4] && args[0] == args[4])) { + /* When the destination overlaps with one of the argument + registers, don't do anything tricky. */ + label_true = gen_new_label(); + label_over = gen_new_label(); + + new_args[5] = label_true; + tcg_out_brcond2(s, new_args, const_args+1, 1); + + tcg_out_movi(s, TCG_TYPE_I32, args[0], 0); + tcg_out_jxx(s, JCC_JMP, label_over, 1); + tcg_out_label(s, label_true, (tcg_target_long)s->code_ptr); + + tcg_out_movi(s, TCG_TYPE_I32, args[0], 1); + tcg_out_label(s, label_over, (tcg_target_long)s->code_ptr); + } else { + /* When the destination does not overlap one of the arguments, + clear the destination first, jump if cond false, and emit an + increment in the true case. This results in smaller code. */ + + tcg_out_movi(s, TCG_TYPE_I32, args[0], 0); + + label_over = gen_new_label(); + new_args[4] = tcg_invert_cond(new_args[4]); + new_args[5] = label_over; + tcg_out_brcond2(s, new_args, const_args+1, 1); + + tgen_arithi(s, ARITH_ADD, args[0], 1, 0); + tcg_out_label(s, label_over, (tcg_target_long)s->code_ptr); + } +} + +static inline int have_cmov(void) +{ +#ifdef __i686__ + /* Compiler options say that cmov is available. */ + return 1; +#else + /* ??? Use cpuid or something and figure out what's running. */ + return 0; +#endif +} + +static void tcg_out_movcond(TCGContext *s, const TCGArg *args, + const int *const_args) +{ + int vtc, vfc, cond, use_cmov = 0, do_swap = 0; + TCGArg d, vt, vf; + + d = args[0]; + vt = args[3]; + vf = args[4]; + vtc = const_args[3]; + vfc = const_args[4]; + + /* ??? The jcc code path below assumes that one mov insn must be skipped. + Rather than complicate the code below, make sure to simplify the + conditional move here. */ + if (vtc == vfc && vt == vf) { + if (vtc) + tcg_out_movi(s, TCG_TYPE_I32, d, vt); + else + tcg_out_mov(s, d, vt); + return; + } + + cond = args[5]; + + /* If both arguments are constants, we *could* do all the funny bits that + gcc does with sbc, masks, etc. There's likely no point. Just use the + jcc version in this case. We also have to be careful about clobbering + inputs when trying to move constants into position. */ + + if (have_cmov()) { + use_cmov = 1; + if (vtc) { + if (vfc || d == vf) + use_cmov = 0; + else + do_swap = 1; + } else if (d == vt) { + if (vfc) + use_cmov = 0; + else + do_swap = 1; + } + } + + if (!use_cmov) { + /* We're going to follow the lead of cmov and set D=VF first, + which means inverting the condition upon which we jump. */ + cond = tcg_invert_cond(cond); + + /* Don't allow the move we jump over to be a nop. */ + do_swap = (!vtc && d == vt); + } + + if (do_swap) { + TCGArg t; + cond = tcg_invert_cond(cond); + t = vf, vf = vt, vt = t; + t = vfc, vfc = vtc, vtc = t; + } + + /* If possible, set D=0 before the compare, so that we can use XOR. */ + if (vfc && vf == 0 && d != args[1] && (const_args[2] || d != args[2])) { + tcg_out_movi(s, TCG_TYPE_I32, d, 0); + vf = d, vfc = 0; + } + + tcg_out_cond(s, cond, args[1], args[2], const_args[2]); + + if (vfc) { + /* Force the use of "mov $0, d" to avoid clobbering flags. */ + tcg_out8(s, 0xb8 + d); + tcg_out32(s, vf); + } else { + tcg_out_mov(s, d, vf); + } + + if (use_cmov) { + assert (!vtc); + tcg_out_modrm(s, 0x40 | tcg_cond_to_jcc[cond] | P_EXT, d, vt); + } else { + int label_next = gen_new_label(); + + tcg_out_jxx(s, tcg_cond_to_jcc[cond], label_next, 1); + if (vtc) + tcg_out_movi(s, TCG_TYPE_I32, d, vt); + else + tcg_out_mov(s, d, vt); + + tcg_out_label(s, label_next, (tcg_target_long)s->code_ptr); + } +} + #if defined(CONFIG_SOFTMMU) #include "../../softmmu_defs.h" @@ -1087,6 +1246,16 @@ static inline void tcg_out_op(TCGContext *s, int opc, tcg_out_modrm(s, 0xb7 | P_EXT, args[0], args[1]); break; + case INDEX_op_setcond_i32: + tcg_out_setcond(s, args[3], args[0], args[1], args[2], const_args[2]); + break; + case INDEX_op_movcond_i32: + tcg_out_movcond(s, args, const_args); + break; + case INDEX_op_setcond2_i32: + tcg_out_setcond2(s, args, const_args); + break; + case INDEX_op_qemu_ld8u: tcg_out_qemu_ld(s, args, 0); break; @@ -1175,6 +1344,10 @@ static const TCGTargetOpDef x86_op_defs[] = { { INDEX_op_ext8u_i32, { "r", "q"} }, { INDEX_op_ext16u_i32, { "r", "r"} }, + { INDEX_op_setcond_i32, { "q", "r", "ri" } }, + { INDEX_op_movcond_i32, { "r", "r", "ri", "ri", "ri" } }, + { INDEX_op_setcond2_i32, { "r", "r", "r", "ri", "ri" } }, + #if TARGET_LONG_BITS == 32 { INDEX_op_qemu_ld8u, { "r", "L" } }, { INDEX_op_qemu_ld8s, { "r", "L" } },