From patchwork Tue Dec 15 13:43:40 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: target-mips: 4Kc, 4KEc cores do not support MIPS16 Date: Tue, 15 Dec 2009 03:43:40 -0000 From: Stefan Weil X-Patchwork-Id: 41189 Message-Id: <1260884620-7810-1-git-send-email-weil@mail.berlios.de> To: Nathan Froyd , Aurelien Jarno , QEMU Developers Cc: 4Kc, 4KEc cores do not support MIPS16, so not only the CP0_Config1 had to be fixed (see previous patch), but also MIPS16 instructions must not be executed. (Hint from Nathan Froyd, thanks). Signed-off-by: Stefan Weil --- target-mips/translate_init.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c index b710979..b79ed56 100644 --- a/target-mips/translate_init.c +++ b/target-mips/translate_init.c @@ -115,7 +115,7 @@ static const mips_def_t mips_defs[] = .CP0_Status_rw_bitmask = 0x1278FF17, .SEGBITS = 32, .PABITS = 32, - .insn_flags = CPU_MIPS32 | ASE_MIPS16, + .insn_flags = CPU_MIPS32, .mmu_type = MMU_TYPE_R4000, }, { @@ -157,7 +157,7 @@ static const mips_def_t mips_defs[] = .CP0_Status_rw_bitmask = 0x1278FF17, .SEGBITS = 32, .PABITS = 32, - .insn_flags = CPU_MIPS32 | ASE_MIPS16, + .insn_flags = CPU_MIPS32, .mmu_type = MMU_TYPE_R4000, }, { @@ -198,7 +198,7 @@ static const mips_def_t mips_defs[] = .CP0_Status_rw_bitmask = 0x1278FF17, .SEGBITS = 32, .PABITS = 32, - .insn_flags = CPU_MIPS32R2 | ASE_MIPS16, + .insn_flags = CPU_MIPS32R2, .mmu_type = MMU_TYPE_R4000, }, {