| Message ID | CAOMZO5DgsxwOn6pw92V651F7mb2NAQfcqtBi8FQ9dGuLzALKmA@mail.gmail.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Stefano Babic |
| Headers | show |
Hi Fabio, Thanks for catching it. Regards, john On Wed, Nov 12, 2014 at 1:14 PM, Fabio Estevam <festevam@gmail.com> wrote: > Hi John, > > On Wed, Nov 12, 2014 at 4:19 PM, Fabio Estevam <festevam@gmail.com> wrote: >> Hi John, >> >> On Wed, Nov 12, 2014 at 3:14 PM, John Tobias <john.tobias.ph@gmail.com> wrote: >>> This patch is for SPL support for iMX6 SabreSD. The said >>> patches has been tested to work on SD2 and SD3 port of the >>> said board. >>> >>> After applying the following patches, it will produces >>> SPL and u-boot.img binary images. You should run the >>> two commands below to store it in your SD or eMMC. >>> >>> sudo dd if=SPL of=/dev/xxx bs=1K seek=1; sync >>> sudo dd if=u-boot.img of=/dev/xxx bs=1K seek=69 >> >> Thanks for working on this of for your patience. >> >> It worked fine here: >> >> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> >> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> > > Actually, I noticed that the SPL version detects 2GB of RAM instead of 1GB. > > Here is a fix for this: > > --- a/board/freescale/mx6sabresd/mx6sabresd.c > +++ b/board/freescale/mx6sabresd/mx6sabresd.c > @@ -741,7 +741,7 @@ static void spl_dram_init(void) > /* config for full 4GB range so that get_mem_size() works */ > .cs_density = 32, /* 32Gb per CS */ > /* single chip select */ > - .ncs = 2, > + .ncs = 1, > .cs1_mirror = 0, > .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */ > > On sabresd only CS0 is used to select all the four DDR3 chips. > > Thanks
--- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -741,7 +741,7 @@ static void spl_dram_init(void) /* config for full 4GB range so that get_mem_size() works */ .cs_density = 32, /* 32Gb per CS */ /* single chip select */ - .ncs = 2, + .ncs = 1, .cs1_mirror = 0, .rtt_wr = 1 /*DDR3_RTT_60_OHM*/, /* RTT_Wr = RZQ/4 */