| Message ID | 1415751501-23407-15-git-send-email-sjg@chromium.org |
|---|---|
| State | Superseded |
| Delegated to: | Simon Glass |
| Headers | show |
Hi Simon, On Wed, Nov 12, 2014 at 8:18 AM, Simon Glass <sjg@chromium.org> wrote: > Some PCI functions cannot be auto-configured. Add a function to set up a > fixed BAR which can be used in these situations. Also add a function to read > the current address of a BAR. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > drivers/pci/pci.c | 24 +++++++++++++++++++++--- > include/pci.h | 23 +++++++++++++++++++++++ > 2 files changed, 44 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index 60c333e..e879d1e 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -363,9 +363,27 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, > return phys_addr; > } > > -/* > - * > - */ > +void pci_config_fixed(struct pci_controller *hose, pci_dev_t dev, int barnum, > + u32 addr) > +{ > + int bar; > + > + bar = PCI_BASE_ADDRESS_0 + barnum * 4; > + pci_hose_write_config_dword(hose, dev, bar, addr); > +} > + Maybe better renane it to pci_write_bar() to match the pci_read_bar() below? And considering it only covers the 32-bit bar, maybe pci_write_bar32() is even better. > +u32 pci_read_bar(struct pci_controller *hose, pci_dev_t dev, int barnum) > +{ > + u32 addr; > + int bar; > + > + bar = PCI_BASE_ADDRESS_0 + barnum * 4; > + pci_hose_read_config_dword(hose, dev, bar, &addr); > + if (addr & PCI_BASE_ADDRESS_SPACE_IO) > + return addr & PCI_BASE_ADDRESS_IO_MASK; > + else > + return addr & PCI_BASE_ADDRESS_MEM_MASK; > +} > pci_read_bar32()? > int pci_hose_config_device(struct pci_controller *hose, > pci_dev_t dev, > diff --git a/include/pci.h b/include/pci.h > index 2ff7365..05c67bc 100644 > --- a/include/pci.h > +++ b/include/pci.h > @@ -677,5 +677,28 @@ extern void pci_mpc824x_init (struct pci_controller *hose); > extern void pci_mpc85xx_init (struct pci_controller *hose); > #endif > > +/** > + * pci_config_fixed() - Write the address of a BAR including control bits > + * > + * This writes a raw address (with control bits) to a bar > + * > + * @hose: PCI hose to use > + * @dev: PCI device to update > + * @barnum: BAR number (0-5) > + * @addr: BAR address with controll bits > + */ > +void pci_config_fixed(struct pci_controller *hose, pci_dev_t dev, int barnum, > + u32 addr); > + > +/** > + * pci_read_bar() - read the address of a bar > + * > + * @hose: PCI hose to use > + * @dev: PCI device to inspect > + * @barnum: BAR number (0-5) > + * @return address of the bar, masking out any control bits > + * */ > +u32 pci_read_bar(struct pci_controller *hose, pci_dev_t dev, int barnum); > + > #endif /* __ASSEMBLY__ */ > #endif /* _PCI_H */ > -- Regards, Bin
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 60c333e..e879d1e 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -363,9 +363,27 @@ phys_addr_t pci_hose_bus_to_phys(struct pci_controller* hose, return phys_addr; } -/* - * - */ +void pci_config_fixed(struct pci_controller *hose, pci_dev_t dev, int barnum, + u32 addr) +{ + int bar; + + bar = PCI_BASE_ADDRESS_0 + barnum * 4; + pci_hose_write_config_dword(hose, dev, bar, addr); +} + +u32 pci_read_bar(struct pci_controller *hose, pci_dev_t dev, int barnum) +{ + u32 addr; + int bar; + + bar = PCI_BASE_ADDRESS_0 + barnum * 4; + pci_hose_read_config_dword(hose, dev, bar, &addr); + if (addr & PCI_BASE_ADDRESS_SPACE_IO) + return addr & PCI_BASE_ADDRESS_IO_MASK; + else + return addr & PCI_BASE_ADDRESS_MEM_MASK; +} int pci_hose_config_device(struct pci_controller *hose, pci_dev_t dev, diff --git a/include/pci.h b/include/pci.h index 2ff7365..05c67bc 100644 --- a/include/pci.h +++ b/include/pci.h @@ -677,5 +677,28 @@ extern void pci_mpc824x_init (struct pci_controller *hose); extern void pci_mpc85xx_init (struct pci_controller *hose); #endif +/** + * pci_config_fixed() - Write the address of a BAR including control bits + * + * This writes a raw address (with control bits) to a bar + * + * @hose: PCI hose to use + * @dev: PCI device to update + * @barnum: BAR number (0-5) + * @addr: BAR address with controll bits + */ +void pci_config_fixed(struct pci_controller *hose, pci_dev_t dev, int barnum, + u32 addr); + +/** + * pci_read_bar() - read the address of a bar + * + * @hose: PCI hose to use + * @dev: PCI device to inspect + * @barnum: BAR number (0-5) + * @return address of the bar, masking out any control bits + * */ +u32 pci_read_bar(struct pci_controller *hose, pci_dev_t dev, int barnum); + #endif /* __ASSEMBLY__ */ #endif /* _PCI_H */
Some PCI functions cannot be auto-configured. Add a function to set up a fixed BAR which can be used in these situations. Also add a function to read the current address of a BAR. Signed-off-by: Simon Glass <sjg@chromium.org> --- drivers/pci/pci.c | 24 +++++++++++++++++++++--- include/pci.h | 23 +++++++++++++++++++++++ 2 files changed, 44 insertions(+), 3 deletions(-)