diff mbox

[5/6] pci: remove pci_config_set_prog_interface

Message ID 94ff6d2cc08d32daccc5699cf857f5f0c3e6227a.1415179427.git.hutao@cn.fujitsu.com
State New
Headers show

Commit Message

Hu Tao Nov. 5, 2014, 9:50 a.m. UTC
See also commit 'pci: remove pci_config_set_vendor_id'.

Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>
---
 hw/block/nvme.c            | 2 +-
 hw/i386/xen/xen_platform.c | 2 +-
 hw/i386/xen/xen_pvdevice.c | 2 +-
 hw/ide/ich.c               | 2 +-
 hw/ide/via.c               | 2 +-
 hw/isa/vt82c686.c          | 2 +-
 hw/mips/gt64xxx_pci.c      | 2 +-
 hw/pci-bridge/i82801b11.c  | 2 +-
 hw/pci-host/bonito.c       | 2 +-
 include/hw/pci/pci.h       | 6 ------
 10 files changed, 9 insertions(+), 15 deletions(-)
diff mbox

Patch

diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 8d7ed78..d9bc149 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -767,7 +767,7 @@  static int nvme_init(PCIDevice *pci_dev)
 
     pci_conf = pci_dev->config;
     pci_conf[PCI_INTERRUPT_PIN] = 1;
-    pci_config_set_prog_interface(pci_dev->config, 0x2);
+    pci_set_byte(pci_dev->config + PCI_CLASS_PROG, 0x2);
     pci_set_word(pci_dev->config + PCI_CLASS_DEVICE, PCI_CLASS_STORAGE_EXPRESS);
     pcie_endpoint_cap_init(&n->parent_obj, 0x80);
 
diff --git a/hw/i386/xen/xen_platform.c b/hw/i386/xen/xen_platform.c
index 28b324a..bcf7038 100644
--- a/hw/i386/xen/xen_platform.c
+++ b/hw/i386/xen/xen_platform.c
@@ -393,7 +393,7 @@  static int xen_platform_initfn(PCIDevice *dev)
 
     pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
 
-    pci_config_set_prog_interface(pci_conf, 0);
+    pci_set_byte(pci_conf + PCI_CLASS_PROG, 0);
 
     pci_conf[PCI_INTERRUPT_PIN] = 1;
 
diff --git a/hw/i386/xen/xen_pvdevice.c b/hw/i386/xen/xen_pvdevice.c
index c218947..7ebc919 100644
--- a/hw/i386/xen/xen_pvdevice.c
+++ b/hw/i386/xen/xen_pvdevice.c
@@ -88,7 +88,7 @@  static int xen_pv_init(PCIDevice *pci_dev)
 
     pci_set_word(pci_conf + PCI_COMMAND, PCI_COMMAND_MEMORY);
 
-    pci_config_set_prog_interface(pci_conf, 0);
+    pci_set_byte(pci_conf + PCI_CLASS_PROG, 0);
 
     pci_conf[PCI_INTERRUPT_PIN] = 1;
 
diff --git a/hw/ide/ich.c b/hw/ide/ich.c
index fb1d095..0263579 100644
--- a/hw/ide/ich.c
+++ b/hw/ide/ich.c
@@ -107,7 +107,7 @@  static int pci_ich9_ahci_init(PCIDevice *dev)
 
     ahci_init(&d->ahci, DEVICE(dev), pci_get_address_space(dev), 6);
 
-    pci_config_set_prog_interface(dev->config, AHCI_PROGMODE_MAJOR_REV_1);
+    pci_set_byte(dev->config + PCI_CLASS_PROG, AHCI_PROGMODE_MAJOR_REV_1);
 
     dev->config[PCI_CACHE_LINE_SIZE] = 0x08;  /* Cache line size */
     dev->config[PCI_LATENCY_TIMER]   = 0x00;  /* Latency timer */
diff --git a/hw/ide/via.c b/hw/ide/via.c
index 4d8089d..bd80821 100644
--- a/hw/ide/via.c
+++ b/hw/ide/via.c
@@ -177,7 +177,7 @@  static int vt82c686b_ide_initfn(PCIDevice *dev)
     PCIIDEState *d = PCI_IDE(dev);
     uint8_t *pci_conf = dev->config;
 
-    pci_config_set_prog_interface(pci_conf, 0x8a); /* legacy ATA mode */
+    pci_set_byte(pci_conf + PCI_CLASS_PROG, 0x8a); /* legacy ATA mode */
     pci_set_long(pci_conf + PCI_CAPABILITY_LIST, 0x000000c0);
 
     qemu_register_reset(via_reset, d);
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index e0c235c..773d102 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -435,7 +435,7 @@  static int vt82c686b_initfn(PCIDevice *d)
     isa_bus = isa_bus_new(&d->qdev, pci_address_space_io(d));
 
     pci_conf = d->config;
-    pci_config_set_prog_interface(pci_conf, 0x0);
+    pci_set_byte(pci_conf + PCI_CLASS_PROG, 0x0);
 
     wmask = d->wmask;
     for (i = 0x00; i < 0xff; i++) {
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c
index 1f2fe5f..02488b0 100644
--- a/hw/mips/gt64xxx_pci.c
+++ b/hw/mips/gt64xxx_pci.c
@@ -1157,7 +1157,7 @@  static int gt64120_pci_init(PCIDevice *d)
     pci_set_word(d->config + PCI_COMMAND, 0);
     pci_set_word(d->config + PCI_STATUS,
                  PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM);
-    pci_config_set_prog_interface(d->config, 0);
+    pci_set_byte(d->config + PCI_CLASS_PROG, 0);
     pci_set_long(d->config + PCI_BASE_ADDRESS_0, 0x00000008);
     pci_set_long(d->config + PCI_BASE_ADDRESS_1, 0x01000008);
     pci_set_long(d->config + PCI_BASE_ADDRESS_2, 0x1c000000);
diff --git a/hw/pci-bridge/i82801b11.c b/hw/pci-bridge/i82801b11.c
index 14cd7fd..79e5445 100644
--- a/hw/pci-bridge/i82801b11.c
+++ b/hw/pci-bridge/i82801b11.c
@@ -71,7 +71,7 @@  static int i82801b11_bridge_initfn(PCIDevice *d)
     if (rc < 0) {
         goto err_bridge;
     }
-    pci_config_set_prog_interface(d->config, PCI_CLASS_BRIDGE_PCI_INF_SUB);
+    pci_set_byte(d->config + PCI_CLASS_PROG, PCI_CLASS_BRIDGE_PCI_INF_SUB);
     return 0;
 
 err_bridge:
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 56292ad..061fe8c 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -712,7 +712,7 @@  static int bonito_initfn(PCIDevice *dev)
     PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);
 
     /* Bonito North Bridge, built on FPGA, VENDOR_ID/DEVICE_ID are "undefined" */
-    pci_config_set_prog_interface(dev->config, 0x00);
+    pci_set_byte(dev->config + PCI_CLASS_PROG, 0x00);
 
     /* set the north bridge register mapping */
     memory_region_init_io(&s->iomem, OBJECT(s), &bonito_ops, s,
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index eb9a2c3..1294e23 100644
--- a/include/hw/pci/pci.h
+++ b/include/hw/pci/pci.h
@@ -462,12 +462,6 @@  pci_get_quad(const uint8_t *config)
 }
 
 static inline void
-pci_config_set_prog_interface(uint8_t *pci_config, uint8_t val)
-{
-    pci_set_byte(&pci_config[PCI_CLASS_PROG], val);
-}
-
-static inline void
 pci_config_set_interrupt_pin(uint8_t *pci_config, uint8_t val)
 {
     pci_set_byte(&pci_config[PCI_INTERRUPT_PIN], val);