diff mbox

[U-Boot,v3,1/2] mmc: fsl_esdhc: Update esdhc driver for iMX6SX

Message ID 1415086549-14731-1-git-send-email-B37916@freescale.com
State Awaiting Upstream
Delegated to: Stefano Babic
Headers show

Commit Message

Ye.Li Nov. 4, 2014, 7:35 a.m. UTC 
The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0
on iMX6SX. So the fsl_esdhc driver must update to set the register,
otherwise no state can be detected.

Signed-off-by: Ye.Li <B37916@freescale.com>
---
Changes since v2:
- None

Changes since v1:
- Remove codes which set INT_STATUS_EN register according PIO or DMA mode.

 drivers/mmc/fsl_esdhc.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

Comments

Stefano Babic Nov. 20, 2014, 9:46 a.m. UTC | #1 
On 04/11/2014 08:35, Ye.Li wrote:
> The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0
> on iMX6SX. So the fsl_esdhc driver must update to set the register,
> otherwise no state can be detected.
> 
> Signed-off-by: Ye.Li <B37916@freescale.com>
> ---

Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 2640607..59b470d 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -23,6 +23,13 @@ 
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define SDHCI_IRQ_EN_BITS		(IRQSTATEN_CC | IRQSTATEN_TC | \
+				IRQSTATEN_CINT | \
+				IRQSTATEN_CTOE | IRQSTATEN_CCE | IRQSTATEN_CEBE | \
+				IRQSTATEN_CIE | IRQSTATEN_DTOE | IRQSTATEN_DCE | \
+				IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR | \
+				IRQSTATEN_DINT)
+
 struct fsl_esdhc {
 	uint    dsaddr;		/* SDMA system address register */
 	uint    blkattr;	/* Block attributes register */
@@ -558,6 +565,7 @@  int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
 	esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN
 				| SYSCTL_IPGEN | SYSCTL_CKEN);
 
+	writel(SDHCI_IRQ_EN_BITS, &regs->irqstaten);
 	memset(&cfg->cfg, 0, sizeof(cfg->cfg));
 
 	voltage_caps = 0;