diff mbox

[U-Boot,v4] powerpc/mpc85xx: modify erratum A007186

Message ID 1414649259-23022-1-git-send-email-B45475@freescale.com
State Accepted
Delegated to: York Sun
Headers show

Commit Message

Zhao Qiang Oct. 30, 2014, 6:07 a.m. UTC
T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function has_errata_a007186
to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the sil has errata a007186, then run the errata code,
if not, doesn't run the code.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
Change-Id: I19d794283229a86d04d8f22d44b860a5c3940cdc
Reviewed-on: http://git.am.freescale.net:8181/19850
Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
Reviewed-by: Yusong Sun <yorksun@freescale.com>
---
Changes for v2:
	- use has_errata_a007186 instead of not_has_errata_a007186
Changes for v3:
	- use "if (has_erratum_a007186() && sel == 0x01 || sel == 0x02) {"
	- instead of "if (has_erratum_a007186()) { 
Changes for v4:
	- update soc info in has_erratum_a007186 function

 arch/powerpc/cpu/mpc85xx/cmd_errata.c          |  3 ++-
 arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c |  3 ++-
 arch/powerpc/include/asm/fsl_errata.h          | 24 ++++++++++++++++++++++++
 3 files changed, 28 insertions(+), 2 deletions(-)

Comments

York Sun Oct. 30, 2014, 4:15 p.m. UTC | #1
On 10/29/2014 11:07 PM, Zhao Qiang wrote:
> T2080 v1.0 has this errata while v1.1 has fixed
> this errata by hardware, add a new function has_errata_a007186
> to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
> if the sil has errata a007186, then run the errata code,
> if not, doesn't run the code.
> 
> Signed-off-by: Zhao Qiang <B45475@freescale.com>
> Change-Id: I19d794283229a86d04d8f22d44b860a5c3940cdc
> Reviewed-on: http://git.am.freescale.net:8181/19850
> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
> Reviewed-by: Yusong Sun <yorksun@freescale.com>
> ---

For future patches, please remove internal review information. It's not
accessible for folks outside of Freescale.

York
Zhao Qiang Oct. 31, 2014, 1:34 a.m. UTC | #2
Got it!

Best Regards
Zhao Qiang


> -----Original Message-----
> From: Sun York-R58495
> Sent: Friday, October 31, 2014 12:16 AM
> To: Zhao Qiang-B45475; u-boot@lists.denx.de
> Cc: Xie Xiaobo-R63061
> Subject: Re: [PATCH v4] powerpc/mpc85xx: modify erratum A007186
> 
> On 10/29/2014 11:07 PM, Zhao Qiang wrote:
> > T2080 v1.0 has this errata while v1.1 has fixed this errata by
> > hardware, add a new function has_errata_a007186 to check the
> > SVR_SOC_VER, SVR_MAJ and SVR_MIN first, if the sil has errata a007186,
> > then run the errata code, if not, doesn't run the code.
> >
> > Signed-off-by: Zhao Qiang <B45475@freescale.com>
> > Change-Id: I19d794283229a86d04d8f22d44b860a5c3940cdc
> > Reviewed-on: http://git.am.freescale.net:8181/19850
> > Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
> > Reviewed-by: Yusong Sun <yorksun@freescale.com>
> > ---
> 
> For future patches, please remove internal review information. It's not
> accessible for folks outside of Freescale.
> 
> York
York Sun Dec. 5, 2014, 4:20 p.m. UTC | #3
On 10/29/2014 11:07 PM, Zhao Qiang wrote:
> T2080 v1.0 has this errata while v1.1 has fixed
> this errata by hardware, add a new function has_errata_a007186
> to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
> if the sil has errata a007186, then run the errata code,
> if not, doesn't run the code.
> 
> Signed-off-by: Zhao Qiang <B45475@freescale.com>
> Change-Id: I19d794283229a86d04d8f22d44b860a5c3940cdc
> Reviewed-on: http://git.am.freescale.net:8181/19850
> Tested-by: Review Code-CDREVIEW <CDREVIEW@freescale.com>
> Reviewed-by: Yusong Sun <yorksun@freescale.com>
> ---
> Changes for v2:
> 	- use has_errata_a007186 instead of not_has_errata_a007186
> Changes for v3:
> 	- use "if (has_erratum_a007186() && sel == 0x01 || sel == 0x02) {"
> 	- instead of "if (has_erratum_a007186()) { 
> Changes for v4:
> 	- update soc info in has_erratum_a007186 function

Applied to u-boot-mpc85xx, awaiting upstream.

York
diff mbox

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
index 3a04a89..0774461 100644
--- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c
+++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c
@@ -270,7 +270,8 @@  static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	puts("Work-around for Erratum USB14 enabled\n");
 #endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_A007186
-	puts("Work-around for Erratum A007186 enabled\n");
+	if (has_erratum_a007186())
+		puts("Work-around for Erratum A007186 enabled\n");
 #endif
 #ifdef CONFIG_SYS_FSL_ERRATUM_A006593
 	puts("Work-around for Erratum A006593 enabled\n");
diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
index 8edf5bb..5cfae47 100644
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c
@@ -11,6 +11,7 @@ 
 #include <asm/processor.h>
 #include <asm/fsl_law.h>
 #include <asm/errno.h>
+#include <asm/fsl_errata.h>
 #include "fsl_corenet2_serdes.h"
 
 #ifdef CONFIG_SYS_FSL_SRDS_1
@@ -203,7 +204,7 @@  u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift)
 
 	sel = (sfp_spfr0 >> FUSE_VAL_SHIFT) & FUSE_VAL_MASK;
 
-	if (sel == 0x01 || sel == 0x02) {
+	if (has_erratum_a007186() && (sel == 0x01 || sel == 0x02)) {
 		for (pll_num = 0; pll_num < SRDS_MAX_BANK; pll_num++) {
 			pll_status = in_be32(&srds_regs->bank[pll_num].pllcr0);
 			debug("A007186: pll_num=%x pllcr0=%x\n",
diff --git a/arch/powerpc/include/asm/fsl_errata.h b/arch/powerpc/include/asm/fsl_errata.h
index 64da4bb..bce2250 100644
--- a/arch/powerpc/include/asm/fsl_errata.h
+++ b/arch/powerpc/include/asm/fsl_errata.h
@@ -82,3 +82,27 @@  static inline bool has_erratum_a007075(void)
 	return false;
 }
 #endif
+
+#ifdef CONFIG_SYS_FSL_ERRATUM_A007186
+static inline bool has_erratum_a007186(void)
+{
+	u32 svr = get_svr();
+	u32 soc = SVR_SOC_VER(svr);
+
+	switch (soc) {
+	case SVR_T4240:
+		return IS_SVR_REV(svr, 2, 0);
+	case SVR_T4160:
+		return IS_SVR_REV(svr, 2, 0);
+	case SVR_B4860:
+		return IS_SVR_REV(svr, 2, 0);
+	case SVR_B4420:
+		return IS_SVR_REV(svr, 2, 0);
+	case SVR_T2081:
+	case SVR_T2080:
+		return IS_SVR_REV(svr, 1, 0);
+	}
+
+	return false;
+}
+#endif