| Message ID | 1414487751-31568-3-git-send-email-Emilian.Medve@Freescale.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Scott Wood |
| Headers | show |
On Oct 28, 2014, at 4:15 AM, Emil Medve <Emilian.Medve@freescale.com> wrote: > Portals are memory mapped interfaces to BMan that allow low-latency, > lock-less interaction by software running on processor cores, accelerators > and network interfaces with the BMan > > Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> > Change-Id: I6d245ffc14ba3d0e91d403ac7c3b91b75a9e6a95 > --- > .../bindings/powerpc/fsl/bman-portals.txt | 52 ++++++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt > > diff --git a/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt b/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt similar comment about location of binding not being PPC specific. > new file mode 100644 > index 0000000..02e0231 > --- /dev/null > +++ b/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt > @@ -0,0 +1,52 @@ > +QorIQ DPAA Buffer Manager Portals Device Tree Binding > + Probably worth putting the text from the commit message here as well. > +Copyright (C) 2008 - 2014 Freescale Semiconductor Inc. > + > +CONTENTS > + > + - BMan Portal > + - Example > + > +BMan Portal Node > + > +PROPERTIES > + > +- compatible > + Usage: Required > + Value type: <stringlist> > + Definition: Must include "fsl,bman-portal-<hardware revision>" > + May include "fsl,<SoC>-bman-portal" or "fsl,bman-portal" > + > +- reg > + Usage: Required > + Value type: <prop-encoded-array> > + Definition: Two regions. The first is the cache-enabled region of > + the portal. The second is the cache-inhibited region of > + the portal > + > +- interrupts > + Usage: Required > + Value type: <prop-encoded-array> > + Definition: Standard property > + > +EXAMPLE > + > +The example below shows a (P4080) BMan portals container/bus node with two portals > + > + bman-portals@ff4000000 { > + #address-cells = <1>; > + #size-cells = <1>; > + compatible = "simple-bus"; > + ranges = <0 0xf 0xf4000000 0x200000>; > + > + bman-portal@0 { > + compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal"; > + reg = <0x0 0x4000>, <0x100000 0x1000>; > + interrupts = <105 2 0 0>; > + }; > + bman-portal@4000 { > + compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal"; > + reg = <0x4000 0x4000>, <0x101000 0x1000>; > + interrupts = <107 2 0 0>; > + }; > + }; > -- > 2.1.2 >
Hello Kumar, On 10/28/2014 09:41 AM, Kumar Gala wrote: > On Oct 28, 2014, at 4:15 AM, Emil Medve <Emilian.Medve@freescale.com> wrote: > >> Portals are memory mapped interfaces to BMan that allow low-latency, >> lock-less interaction by software running on processor cores, accelerators >> and network interfaces with the BMan >> >> Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> >> Change-Id: I6d245ffc14ba3d0e91d403ac7c3b91b75a9e6a95 >> --- >> .../bindings/powerpc/fsl/bman-portals.txt | 52 ++++++++++++++++++++++ >> 1 file changed, 52 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt >> >> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt b/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt > > similar comment about location of binding not being PPC specific. Will move it to Documentation/devicetree/bindings/soc >> new file mode 100644 >> index 0000000..02e0231 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt >> @@ -0,0 +1,52 @@ >> +QorIQ DPAA Buffer Manager Portals Device Tree Binding >> + > > Probably worth putting the text from the commit message here as well. Ok Cheers,
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt b/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt new file mode 100644 index 0000000..02e0231 --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt @@ -0,0 +1,52 @@ +QorIQ DPAA Buffer Manager Portals Device Tree Binding + +Copyright (C) 2008 - 2014 Freescale Semiconductor Inc. + +CONTENTS + + - BMan Portal + - Example + +BMan Portal Node + +PROPERTIES + +- compatible + Usage: Required + Value type: <stringlist> + Definition: Must include "fsl,bman-portal-<hardware revision>" + May include "fsl,<SoC>-bman-portal" or "fsl,bman-portal" + +- reg + Usage: Required + Value type: <prop-encoded-array> + Definition: Two regions. The first is the cache-enabled region of + the portal. The second is the cache-inhibited region of + the portal + +- interrupts + Usage: Required + Value type: <prop-encoded-array> + Definition: Standard property + +EXAMPLE + +The example below shows a (P4080) BMan portals container/bus node with two portals + + bman-portals@ff4000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "simple-bus"; + ranges = <0 0xf 0xf4000000 0x200000>; + + bman-portal@0 { + compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal"; + reg = <0x0 0x4000>, <0x100000 0x1000>; + interrupts = <105 2 0 0>; + }; + bman-portal@4000 { + compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal"; + reg = <0x4000 0x4000>, <0x101000 0x1000>; + interrupts = <107 2 0 0>; + }; + };
Portals are memory mapped interfaces to BMan that allow low-latency, lock-less interaction by software running on processor cores, accelerators and network interfaces with the BMan Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Change-Id: I6d245ffc14ba3d0e91d403ac7c3b91b75a9e6a95 --- .../bindings/powerpc/fsl/bman-portals.txt | 52 ++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/bman-portals.txt