| Message ID | 1414403359-22332-2-git-send-email-acourbot@nvidia.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
diff --git a/lib/core/os.h b/lib/core/os.h index fba9542292ac..79462eb2cfd4 100644 --- a/lib/core/os.h +++ b/lib/core/os.h @@ -101,6 +101,8 @@ typedef dma_addr_t resource_size_t; #define __printf(a,b) #define __user +#define IS_ENABLED(x) (0) + static inline int order_base_2(u64 base) { diff --git a/nvkm/include/core/device.h b/nvkm/include/core/device.h index 1d9d893929bb..0d839e1ddaf4 100644 --- a/nvkm/include/core/device.h +++ b/nvkm/include/core/device.h @@ -158,6 +158,12 @@ nv_device_is_pci(struct nouveau_device *device) return device->pdev != NULL; } +static inline bool +nv_device_is_cpu_coherent(struct nouveau_device *device) +{ + return (!IS_ENABLED(CONFIG_ARM) && nv_device_is_pci(device)); +} + static inline struct device * nv_device_base(struct nouveau_device *device) {
Add a function allowing us to know whether a device is CPU-coherent, i.e. accesses performed by the CPU on GPU-mapped buffers will be immediately visible on the GPU side and vice-versa. For now, a device is considered to be coherent if it uses the PCI bus on a non-ARM architecture. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> --- lib/core/os.h | 2 ++ nvkm/include/core/device.h | 6 ++++++ 2 files changed, 8 insertions(+)