From patchwork Mon Oct 27 07:59:43 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Pinski X-Patchwork-Id: 403431 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 1EEE6140081 for ; Mon, 27 Oct 2014 19:03:53 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id:in-reply-to :references; q=dns; s=default; b=v9iVtn0zK15EQj+Szt3N8+Xpxxu/5GD 1+hou/dGAY3vegjz2E8M5q6zwxgmdPetnnjxREUR62f7mUCc9eQliYkcceVhYIZb lQ0W6RxXvRdspgYO4AIHg93MI8iMX24/At9h2ilwxj3508f84DYc6W+1uKNypCH5 W6eCBYxPV5So= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id:in-reply-to :references; s=default; bh=ipfQ8IYgsilfRBO4o5JAmI3ZMGE=; b=JQGpL HeTMuYCjE06BgEh5IRoVRbwf9cgR/UZPmJzGrAGTRcGaNoxoTye0x34x81iliGYi NC2+MY91WUAw470rKGJAauBc/ZB9JRw3E+tXnC2DysGw3xQAiN54olxZ8ZwG8L92 6rFgIQsVFgsfzkFhL7jdOZ9SdXkzy+1xk4Au2Q= Received: (qmail 16513 invoked by alias); 27 Oct 2014 08:00:21 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 15565 invoked by uid 89); 27 Oct 2014 08:00:04 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 X-HELO: mail-ig0-f181.google.com X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=v6dn8s5E+n7C4ZCG8hh4baymm2yQVkv323b2lzcja/Q=; b=mPPKmqvScoUP6Y33dWVPpInbRaWd9hi5FNYvrmwvSVJ4D7ynhuC39ZaWEteP1jGd46 lm9krMg3+1kxvvuLW94XUAgc1lYsAoRmSNs1aJ91EON2BpFYVqAO6XJvKBDusYu85lWG J8Cp0K21vCT9wpvf78t42/A2eWqLkMuh1hIPu76Ky0NvVb5Za+7LZ40N3WSelIY9LNro nPlqxCIjQHtMkuHpcXN9LBz4NWCmClddhUVvgCLtsiAL0Cp56DQuGlqtm42yViEUV+qw 7LrFvYUHtFa5v28FtqvHGD6iDr2XaQC8YQyMlxPi9Jg6lxqxGrNA8AvTygfOQmtjtomT PyWg== X-Gm-Message-State: ALoCoQlbdrsuyIvRdO3VMFPzU0LA00BwCBRJR69iy8jsvpyZDyUOqnBj6YGqwIS+7rH5yB4GPm2G X-Received: by 10.50.4.7 with SMTP id g7mr11160535igg.1.1414396800022; Mon, 27 Oct 2014 01:00:00 -0700 (PDT) From: Andrew Pinski To: libc-alpha@sourceware.org Cc: Andrew Pinski Subject: [PATCH 19/29] [AARCH64] Add ILP32 support to elf_machine_load_address. Date: Mon, 27 Oct 2014 00:59:43 -0700 Message-Id: <1414396793-9005-20-git-send-email-apinski@cavium.com> In-Reply-To: <1414396793-9005-1-git-send-email-apinski@cavium.com> References: <1414396793-9005-1-git-send-email-apinski@cavium.com> This adds ILP32 support to elf_machine_load_address. Since elf_machine_load_address depends on the static address being found without relocations, we need to use 16bit relocation which gets resolved at link time for ILP32. This is just like how the 32bit relocation gets resolved at link time for LP64. * sysdeps/aarch64/dl-machine.h (elf_machine_load_address): Add support for ILP32. --- sysdeps/aarch64/dl-machine.h | 20 +++++++++++++++++--- 1 files changed, 17 insertions(+), 3 deletions(-) diff --git a/sysdeps/aarch64/dl-machine.h b/sysdeps/aarch64/dl-machine.h index 121b178..f3bcad1 100644 --- a/sysdeps/aarch64/dl-machine.h +++ b/sysdeps/aarch64/dl-machine.h @@ -54,19 +54,33 @@ elf_machine_load_address (void) by constructing a non GOT reference to the symbol, the dynamic address of the symbol we compute using adrp/add to compute the symbol's address relative to the PC. - This depends on 32bit relocations being resolved at link time - and that the static address fits in the 32bits. */ + This depends on 32/16bit relocations being resolved at link time + and that the static address fits in the 32/16 bits. */ ElfW(Addr) static_addr; ElfW(Addr) dynamic_addr; asm (" \n" " adrp %1, _dl_start; \n" +#ifdef __LP64__ " add %1, %1, #:lo12:_dl_start \n" -" ldr %w0, 1f \n" +#else +" add %w1, %w1, #:lo12:_dl_start \n" +#endif +" ldr %w0, 1f \n" " b 2f \n" "1: \n" +#ifdef __LP64__ " .word _dl_start \n" +#else +# ifdef __AARCH64EB__ +" .short 0 \n" +# endif +" .short _dl_start \n" +# ifndef __AARCH64EB__ +" .short 0 \n" +# endif +#endif "2: \n" : "=r" (static_addr), "=r" (dynamic_addr)); return dynamic_addr - static_addr;