@@ -2609,11 +2609,6 @@ CBFS (Coreboot Filesystem) support
Enables the driver for SPI controller on SuperH. Currently
only SH7757 is supported.
- CONFIG_SPI_X
-
- Enables extended (16-bit) SPI EEPROM addressing.
- (symmetrical to CONFIG_I2C_X)
-
CONFIG_SOFT_SPI
Enables a software (bit-bang) SPI driver rather than
@@ -83,7 +83,7 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
unsigned maxlen;
#endif
-#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
+#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
uchar addr[2];
blk_off = offset & 0xFF; /* block offset */
@@ -100,7 +100,7 @@ int eeprom_read (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cnt
addr[1] = offset >> 8; /* upper address octet */
addr[2] = blk_off; /* lower address octet */
alen = 3;
-#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
+#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
addr[0] |= dev_addr; /* insert device address */
@@ -153,7 +153,7 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
unsigned maxlen;
#endif
-#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1 && !defined(CONFIG_SPI_X)
+#if CONFIG_SYS_I2C_EEPROM_ADDR_LEN == 1
uchar addr[2];
blk_off = offset & 0xFF; /* block offset */
@@ -170,7 +170,7 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
addr[1] = offset >> 8; /* upper address octet */
addr[2] = blk_off; /* lower address octet */
alen = 3;
-#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN, CONFIG_SPI_X */
+#endif /* CONFIG_SYS_I2C_EEPROM_ADDR_LEN */
addr[0] |= dev_addr; /* insert device address */
This macro is no longer used, so just reap it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de> --- README | 5 ----- common/cmd_eeprom.c | 8 ++++---- 2 files changed, 4 insertions(+), 9 deletions(-)