diff mbox

[5/9] Don't call apic functions directly from kvm code

Message ID 1259761575-3953-6-git-send-email-glommer@redhat.com
State New
Headers show

Commit Message

Glauber Costa Dec. 2, 2009, 1:46 p.m. UTC 
It is actually not necessary to call a tpr function to save and load cr8,
as cr8 is part of the processor state, and thus, it is much easier
to just add it to CPUState.

As for apic base, wrap kvm usages, so we can call either the qemu device,
or the in kernel version.

Signed-off-by: Glauber Costa <glommer@redhat.com>
---
 target-i386/cpu.h |    1 +
 target-i386/kvm.c |   25 +++++++++++++++++++------
 2 files changed, 20 insertions(+), 6 deletions(-)

Comments

Avi Kivity Dec. 3, 2009, 12:12 p.m. UTC | #1 
On 12/02/2009 03:46 PM, Glauber Costa wrote:
> It is actually not necessary to call a tpr function to save and load cr8,
> as cr8 is part of the processor state, and thus, it is much easier
> to just add it to CPUState.
>
> As for apic base, wrap kvm usages, so we can call either the qemu device,
> or the in kernel version.
>    

> @@ -789,8 +802,8 @@ int kvm_arch_post_run(CPUState *env, struct kvm_run *run)
>       else
>           env->eflags&= ~IF_MASK;
>
> -    cpu_set_apic_tpr(env, run->cr8);
> -    cpu_set_apic_base(env, run->apic_base);
> +    env->cr8 = run->cr8;
> +    kvm_set_apic_base(env, run->apic_base);
>
>    

This will break irqchip-in-qemu, since the APIC tpr will be disconnected 
from the guest's cr8.
diff mbox

Patch

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index eb9532a..7c4fa47 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -606,6 +606,7 @@  typedef struct CPUX86State {
     SegmentCache idt; /* only base and limit are used */
 
     target_ulong cr[5]; /* NOTE: cr1 is unused */
+    target_ulong cr8;
     int32_t a20_mask;
 
     /* FPU state */
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index cf42f85..78fc941 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -344,6 +344,19 @@  static void get_seg(SegmentCache *lhs, const struct kvm_segment *rhs)
 	| (rhs->avl * DESC_AVL_MASK);
 }
 
+static void kvm_set_apic_base(CPUState *env, uint64_t val)
+{
+    if (!kvm_irqchip_in_kernel())
+        cpu_set_apic_base(env, val);
+}
+
+static uint64_t kvm_get_apic_base(CPUState *env)
+{
+    if (!kvm_irqchip_in_kernel())
+        return cpu_get_apic_base(env);
+    return 0;
+}
+
 static void kvm_getput_reg(__u64 *kvm_reg, target_ulong *qemu_reg, int set)
 {
     if (set)
@@ -455,8 +468,8 @@  static int kvm_put_sregs(CPUState *env)
     sregs.cr3 = env->cr[3];
     sregs.cr4 = env->cr[4];
 
-    sregs.cr8 = cpu_get_apic_tpr(env);
-    sregs.apic_base = cpu_get_apic_base(env);
+    sregs.cr8 = env->cr8;
+    sregs.apic_base = kvm_get_apic_base(env);
 
     sregs.efer = env->efer;
 
@@ -561,7 +574,7 @@  static int kvm_get_sregs(CPUState *env)
     env->cr[3] = sregs.cr3;
     env->cr[4] = sregs.cr4;
 
-    cpu_set_apic_base(env, sregs.apic_base);
+    kvm_set_apic_base(env, sregs.apic_base);
 
     env->efer = sregs.efer;
     //cpu_set_apic_tpr(env, sregs.cr8);
@@ -777,7 +790,7 @@  int kvm_arch_pre_run(CPUState *env, struct kvm_run *run)
         run->request_interrupt_window = 0;
 
     dprintf("setting tpr\n");
-    run->cr8 = cpu_get_apic_tpr(env);
+    run->cr8 = env->cr8;
 
     return 0;
 }
@@ -789,8 +802,8 @@  int kvm_arch_post_run(CPUState *env, struct kvm_run *run)
     else
         env->eflags &= ~IF_MASK;
     
-    cpu_set_apic_tpr(env, run->cr8);
-    cpu_set_apic_base(env, run->apic_base);
+    env->cr8 = run->cr8;
+    kvm_set_apic_base(env, run->apic_base);
 
     return 0;
 }