| Message ID | 1413536021-4886-6-git-send-email-ray.huang@amd.com |
|---|---|
| State | Not Applicable |
| Headers | show |
HI, On Fri, Oct 17, 2014 at 04:53:30PM +0800, Huang Rui wrote: > This patch adds a quirks flag at dwc3 structure, and SoCs platform vendor is > able to define this flag in platform data at bus glue layer. Then do some > independent behaviors at dwc3 core level. > > Signed-off-by: Huang Rui <ray.huang@amd.com> > --- > drivers/usb/dwc3/core.c | 2 ++ > drivers/usb/dwc3/core.h | 3 +++ > drivers/usb/dwc3/dwc3-pci.c | 9 +++++++++ > drivers/usb/dwc3/platform_data.h | 2 ++ > 4 files changed, 16 insertions(+) > > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c > index ddac372..50c0eae 100644 > --- a/drivers/usb/dwc3/core.c > +++ b/drivers/usb/dwc3/core.c > @@ -710,6 +710,8 @@ static int dwc3_probe(struct platform_device *pdev) > > dwc->needs_fifo_resize = pdata->tx_fifo_resize; > dwc->dr_mode = pdata->dr_mode; > + > + dwc->quirks = pdata->quirks; > } > > /* default to superspeed if no maximum_speed passed */ > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h > index f6ee623..cfe0d57 100644 > --- a/drivers/usb/dwc3/core.h > +++ b/drivers/usb/dwc3/core.h > @@ -636,6 +636,7 @@ struct dwc3_scratchpad_array { > * @u1u2: only used on revisions <1.83a for workaround > * @maximum_speed: maximum speed requested (mainly for testing purposes) > * @revision: revision register contents > + * @quirks: represents different SOCs hardware work-arounds and quirks > * @dr_mode: requested mode of operation > * @usb2_phy: pointer to USB2 PHY > * @usb3_phy: pointer to USB3 PHY > @@ -740,6 +741,8 @@ struct dwc3 { > #define DWC3_REVISION_270A 0x5533270a > #define DWC3_REVISION_280A 0x5533280a > > + u32 quirks; > + > enum dwc3_ep0_next ep0_next_event; > enum dwc3_ep0_state ep0state; > enum dwc3_link_state link_state; > diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c > index 3806547..18569a4 100644 > --- a/drivers/usb/dwc3/dwc3-pci.c > +++ b/drivers/usb/dwc3/dwc3-pci.c > @@ -25,6 +25,8 @@ > #include <linux/usb/otg.h> > #include <linux/usb/usb_phy_generic.h> > > +#include "platform_data.h" > + > /* FIXME define these in <linux/pci_ids.h> */ > #define PCI_VENDOR_ID_SYNOPSYS 0x16c3 > #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd > @@ -103,6 +105,9 @@ static int dwc3_pci_probe(struct pci_dev *pci, > struct dwc3_pci *glue; > int ret; > struct device *dev = &pci->dev; > + struct dwc3_platform_data dwc3_pdata; > + > + memset(&dwc3_pdata, 0x00, sizeof(dwc3_pdata)); > > glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL); > if (!glue) > @@ -149,6 +154,10 @@ static int dwc3_pci_probe(struct pci_dev *pci, > > pci_set_drvdata(pci, glue); > > + ret = platform_device_add_data(dwc3, &dwc3_pdata, sizeof(dwc3_pdata)); > + if (ret) > + goto err3; > + > dma_set_coherent_mask(&dwc3->dev, dev->coherent_dma_mask); > > dwc3->dev.dma_mask = dev->dma_mask; > diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h > index 7db34f0..1d3d65f 100644 > --- a/drivers/usb/dwc3/platform_data.h > +++ b/drivers/usb/dwc3/platform_data.h > @@ -24,4 +24,6 @@ struct dwc3_platform_data { > enum usb_device_speed maximum_speed; > enum usb_dr_mode dr_mode; > bool tx_fifo_resize; > + > + u32 quirks; I prefer to have one-bit fields like we already have for delayed_status, ep0_bounced, ep0_expect_in, and so on. That makes it easier to support the same quirks through devicetree as well.
On Fri, Oct 17, 2014 at 09:41:44AM -0500, Felipe Balbi wrote: > HI, > > On Fri, Oct 17, 2014 at 04:53:30PM +0800, Huang Rui wrote: > > This patch adds a quirks flag at dwc3 structure, and SoCs platform vendor is > > able to define this flag in platform data at bus glue layer. Then do some > > independent behaviors at dwc3 core level. > > > > Signed-off-by: Huang Rui <ray.huang@amd.com> > > --- > > drivers/usb/dwc3/core.c | 2 ++ > > drivers/usb/dwc3/core.h | 3 +++ > > drivers/usb/dwc3/dwc3-pci.c | 9 +++++++++ > > drivers/usb/dwc3/platform_data.h | 2 ++ > > 4 files changed, 16 insertions(+) > > <snip> > > diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h > > index 7db34f0..1d3d65f 100644 > > --- a/drivers/usb/dwc3/platform_data.h > > +++ b/drivers/usb/dwc3/platform_data.h > > @@ -24,4 +24,6 @@ struct dwc3_platform_data { > > enum usb_device_speed maximum_speed; > > enum usb_dr_mode dr_mode; > > bool tx_fifo_resize; > > + > > + u32 quirks; > > I prefer to have one-bit fields like we already have for delayed_status, > ep0_bounced, ep0_expect_in, and so on. That makes it easier to support > the same quirks through devicetree as well. > So it should define like below: struct dwc3_platform_data { ... unsigned one_quirk:1; } Then also defined it in dwc3 structure. And when dwc3 probed, put this value from glue layer to dwc3, right? Thanks, Rui -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Oct 20, 2014 at 02:02:17PM +0800, Huang Rui wrote: > On Fri, Oct 17, 2014 at 09:41:44AM -0500, Felipe Balbi wrote: > > HI, > > > > On Fri, Oct 17, 2014 at 04:53:30PM +0800, Huang Rui wrote: > > > This patch adds a quirks flag at dwc3 structure, and SoCs platform vendor is > > > able to define this flag in platform data at bus glue layer. Then do some > > > independent behaviors at dwc3 core level. > > > > > > Signed-off-by: Huang Rui <ray.huang@amd.com> > > > --- > > > drivers/usb/dwc3/core.c | 2 ++ > > > drivers/usb/dwc3/core.h | 3 +++ > > > drivers/usb/dwc3/dwc3-pci.c | 9 +++++++++ > > > drivers/usb/dwc3/platform_data.h | 2 ++ > > > 4 files changed, 16 insertions(+) > > > > > <snip> > > > > diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h > > > index 7db34f0..1d3d65f 100644 > > > --- a/drivers/usb/dwc3/platform_data.h > > > +++ b/drivers/usb/dwc3/platform_data.h > > > @@ -24,4 +24,6 @@ struct dwc3_platform_data { > > > enum usb_device_speed maximum_speed; > > > enum usb_dr_mode dr_mode; > > > bool tx_fifo_resize; > > > + > > > + u32 quirks; > > > > I prefer to have one-bit fields like we already have for delayed_status, > > ep0_bounced, ep0_expect_in, and so on. That makes it easier to support > > the same quirks through devicetree as well. > > > > So it should define like below: > > struct dwc3_platform_data { > ... > unsigned one_quirk:1; > } > > Then also defined it in dwc3 structure. And when dwc3 probed, put this > value from glue layer to dwc3, right? that's correct.
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index ddac372..50c0eae 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -710,6 +710,8 @@ static int dwc3_probe(struct platform_device *pdev) dwc->needs_fifo_resize = pdata->tx_fifo_resize; dwc->dr_mode = pdata->dr_mode; + + dwc->quirks = pdata->quirks; } /* default to superspeed if no maximum_speed passed */ diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index f6ee623..cfe0d57 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -636,6 +636,7 @@ struct dwc3_scratchpad_array { * @u1u2: only used on revisions <1.83a for workaround * @maximum_speed: maximum speed requested (mainly for testing purposes) * @revision: revision register contents + * @quirks: represents different SOCs hardware work-arounds and quirks * @dr_mode: requested mode of operation * @usb2_phy: pointer to USB2 PHY * @usb3_phy: pointer to USB3 PHY @@ -740,6 +741,8 @@ struct dwc3 { #define DWC3_REVISION_270A 0x5533270a #define DWC3_REVISION_280A 0x5533280a + u32 quirks; + enum dwc3_ep0_next ep0_next_event; enum dwc3_ep0_state ep0state; enum dwc3_link_state link_state; diff --git a/drivers/usb/dwc3/dwc3-pci.c b/drivers/usb/dwc3/dwc3-pci.c index 3806547..18569a4 100644 --- a/drivers/usb/dwc3/dwc3-pci.c +++ b/drivers/usb/dwc3/dwc3-pci.c @@ -25,6 +25,8 @@ #include <linux/usb/otg.h> #include <linux/usb/usb_phy_generic.h> +#include "platform_data.h" + /* FIXME define these in <linux/pci_ids.h> */ #define PCI_VENDOR_ID_SYNOPSYS 0x16c3 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd @@ -103,6 +105,9 @@ static int dwc3_pci_probe(struct pci_dev *pci, struct dwc3_pci *glue; int ret; struct device *dev = &pci->dev; + struct dwc3_platform_data dwc3_pdata; + + memset(&dwc3_pdata, 0x00, sizeof(dwc3_pdata)); glue = devm_kzalloc(dev, sizeof(*glue), GFP_KERNEL); if (!glue) @@ -149,6 +154,10 @@ static int dwc3_pci_probe(struct pci_dev *pci, pci_set_drvdata(pci, glue); + ret = platform_device_add_data(dwc3, &dwc3_pdata, sizeof(dwc3_pdata)); + if (ret) + goto err3; + dma_set_coherent_mask(&dwc3->dev, dev->coherent_dma_mask); dwc3->dev.dma_mask = dev->dma_mask; diff --git a/drivers/usb/dwc3/platform_data.h b/drivers/usb/dwc3/platform_data.h index 7db34f0..1d3d65f 100644 --- a/drivers/usb/dwc3/platform_data.h +++ b/drivers/usb/dwc3/platform_data.h @@ -24,4 +24,6 @@ struct dwc3_platform_data { enum usb_device_speed maximum_speed; enum usb_dr_mode dr_mode; bool tx_fifo_resize; + + u32 quirks; };
This patch adds a quirks flag at dwc3 structure, and SoCs platform vendor is able to define this flag in platform data at bus glue layer. Then do some independent behaviors at dwc3 core level. Signed-off-by: Huang Rui <ray.huang@amd.com> --- drivers/usb/dwc3/core.c | 2 ++ drivers/usb/dwc3/core.h | 3 +++ drivers/usb/dwc3/dwc3-pci.c | 9 +++++++++ drivers/usb/dwc3/platform_data.h | 2 ++ 4 files changed, 16 insertions(+)