From patchwork Mon Oct 13 19:36:18 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Felipe Balbi X-Patchwork-Id: 399270 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 1A8311400AB for ; Tue, 14 Oct 2014 06:36:27 +1100 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753201AbaJMTg0 (ORCPT ); Mon, 13 Oct 2014 15:36:26 -0400 Received: from arroyo.ext.ti.com ([192.94.94.40]:48451 "EHLO arroyo.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753170AbaJMTgZ (ORCPT ); Mon, 13 Oct 2014 15:36:25 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id s9DJaNHm031595; Mon, 13 Oct 2014 14:36:23 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id s9DJaNDU000713; Mon, 13 Oct 2014 14:36:23 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.174.1; Mon, 13 Oct 2014 14:36:23 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id s9DJaM1j020401; Mon, 13 Oct 2014 14:36:23 -0500 Date: Mon, 13 Oct 2014 14:36:18 -0500 From: Felipe Balbi To: Felipe Balbi CC: David Cohen , , , , Subject: Re: [PATCH] pinctrl: baytrail: show output gpio state correctly on Intel Baytrail Message-ID: <20141013193618.GD29810@saruman> Reply-To: References: <1412355319-18946-1-git-send-email-david.a.cohen@linux.intel.com> <1413224639-21552-1-git-send-email-david.a.cohen@linux.intel.com> <20141013191405.GB29810@saruman> <20141013192404.GB4034@psi-dev26.jf.intel.com> <20141013192632.GC29810@saruman> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20141013192632.GC29810@saruman> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Mon, Oct 13, 2014 at 02:26:32PM -0500, Felipe Balbi wrote: > Hi, > > On Mon, Oct 13, 2014 at 12:24:04PM -0700, David Cohen wrote: > > On Mon, Oct 13, 2014 at 02:14:05PM -0500, Felipe Balbi wrote: > > > On Mon, Oct 13, 2014 at 11:23:59AM -0700, David Cohen wrote: > > > > Even if a gpio pin is set to output, we still need to set INPUT_EN bit > > > > > > here you say you're setting that bit. > > > > > > > to be able to read its value. Without this change, we'll always read low > > > > level state. > > > > > > > > Cc: # v3.14+ > > > > Signed-off-by: David Cohen > > > > --- > > > > > > > > Hi, > > > > > > > > I'm resending same v1 patch but now copying linux stable and linux gpio. > > > > This patch is meant for all linux stable trees >= v3.14. > > > > > > > > Br, David > > > > --- > > > > > > > > drivers/pinctrl/pinctrl-baytrail.c | 2 +- > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c > > > > index e12e5b07f6d7..c23d8ded936d 100644 > > > > --- a/drivers/pinctrl/pinctrl-baytrail.c > > > > +++ b/drivers/pinctrl/pinctrl-baytrail.c > > > > @@ -318,7 +318,7 @@ static int byt_gpio_direction_output(struct gpio_chip *chip, > > > > "Potential Error: Setting GPIO with direct_irq_en to output"); > > > > > > > > reg_val = readl(reg) | BYT_DIR_MASK; > > > > - reg_val &= ~BYT_OUTPUT_EN; > > > > + reg_val &= ~(BYT_OUTPUT_EN | BYT_INPUT_EN); > > > > > > but code is clearing it. Also, you're not patching byt_gpio_get(), so > > > you can't be 'reading its value' either. Quite frankly, this looks very > > > fishy to me. Comments on BYT_OUTPUT_EN and BYT_INPUT_EN states that > > > those bits are active low, meaning that clearing them enables that > > > particular feature. > > > > > > How can you enable a pin to be both OUTPUT and INPUT ? Look like what > > > you really want is: > > > > > > diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c > > > index e12e5b0..69f882d 100644 > > > --- a/drivers/pinctrl/pinctrl-baytrail.c > > > +++ b/drivers/pinctrl/pinctrl-baytrail.c > > > @@ -290,6 +290,7 @@ static int byt_gpio_direction_input(struct gpio_chip *chip, unsigned offset) > > > > > > value = readl(reg) | BYT_DIR_MASK; > > > value &= ~BYT_INPUT_EN; /* active low */ > > > + value |= BYT_OUTPUT_EN; /* disable output */ > > > writel(value, reg); > > > > > > spin_unlock_irqrestore(&vg->lock, flags); > > > @@ -319,6 +320,7 @@ static int byt_gpio_direction_output(struct gpio_chip *chip, > > > > > > reg_val = readl(reg) | BYT_DIR_MASK; > > > reg_val &= ~BYT_OUTPUT_EN; > > > + value |= BYT_INPUT_EN; /* disable input */ > > > > > > if (value) > > > writel(reg_val | BYT_LEVEL, reg); > > > > > > completely untested however. Care to further explain why clearing both > > > bits - thus enabling both INPUT and OUTPUT - is correct ? > > > > Actually I really meant what I sent, but perhaps I misspoke during > > explanation. We need to clear the bit to enable the functionality. > > > > !BYT_INPUT_EN allows us to read the value. !BYT_OUTPUT_EN allows us to > > set a value. If we want to set a value (acting as output) and still be > > able to read via sysfs, we need to set both functionality (i.e. clear > > both bits). > > > > I'll resend the patch with a better comment. > > Alright, just make sure that exposing a pin through sysfs and making it > output high, then later switching it to input works. It looks like > byt_gpio_direction_input() still needs to make sure OUTPUT is set. I also noticed that this is missing: (also untested) ps: is BayTrail documentation available publicly ? diff --git a/drivers/pinctrl/pinctrl-baytrail.c b/drivers/pinctrl/pinctrl-baytrail.c index e12e5b0..7db5ab9 100644 --- a/drivers/pinctrl/pinctrl-baytrail.c +++ b/drivers/pinctrl/pinctrl-baytrail.c @@ -614,3 +614,9 @@ static int __init byt_gpio_init(void) } subsys_initcall(byt_gpio_init); + +static void __exit byt_gpio_exit(void) +{ + platform_driver_unregister(&byt_gpio_driver); +} +module_exit(byt_gpio_exit);